Sony PXW-X500 Service Manual page 18

• The WRR_DET signal (Pin 7 of connector CN1) is used to determine which wireless receiver has been connected.
D1, C6, Q3, and R13 configure a circuit to receive the signal.
When the WRR-855 communication-format receiver is connected, a voltage of about 0.7 V is generated on Pin 7.
Diode D1 is used to prevent Q3 from being turned on by this voltage.
• The WRR_CS signal (Pin 10 of connector CN1) is used as a signal line for the WRR-855 communication format
from the result of determination by using Pin 7 above. In other cases, high level is output.
R8, IC8, and R14 configure a circuit for the WRR-855 communication format.
• The WRR_CLK signal (Pin 9 of connector CN1), the WRR_DI signal (Pin 11), and the WRR_DO signal (Pin 12)
are used as WRR-855 communication-format signal lines from the result of determination by using Pin 7. In other
cases, these signals are used for asynchronous communication.
R4 to R7, Q1, Q2, IC7, R10, and R11 configure a circuit that supports both communication formats (asynchronous
communication and WRR-855 communication).
• When an analog wireless receiver is connected, the WL_A_CH1 signal (Pin 2 of connector CN1) is amplified in
IC9 and is then sent from the connector (CN2) through the connector (CN12) on the MB-1210 board to the AU-360
board.
• The BCK signal (Pin 6 of connector CN1), the XLRCK signal (Pin 13), the WL_DT12 signal (Pin 14), and the
WL_DT34 signal (Pin 15) are transmitted from digital wireless signal to digital audio signal by I²S.
When these signals are determined to be analog wireless signals, these are closed by IC1 to IC4.
AU-360 Board
The AU-360 board has the following functions:
Switching rear MIC/LINE input level and rear MIC +48 V voltage, switching front MIC input level and front MIC +48
V voltage, input signal selection and head room level adjustment, AD/DA conversion using AUDIO CODEC, SP/HP
amplification, DC-DC converter for MIC +48 V voltage.
In addition, this board mounts an FPGA (IC801) and a DSP (IC1000). The DSP provides many functions including
AGC, Wind Filter, monitor potentiometer, and monitor switching control.
The FPGA (IC801) has serial audio S/P and P/S conversion, mute control, wireless control, DSP control, and other
functions.
Main Blocks and Functions
Rear MIC/LINE input block
Audio input signals are sent from the AXM-52 board rear LINE/MIC input 3-pin XLR connectors (CN101, CN102)
through the connector (CN23) on the MB-1210 board to the AU-360 board.
The MIC input level (-30 to -60 dBu/10 dB step, -70 dBu and -60 dBu are same setting) is common to the LINE input
level (+4, 0, and -3 dBu). Input attenuator and amplifier are inserted by switches (Q104 to Q111, Q118 to Q121, Q200
to Q211).
Furthermore, 0 dBu or +4 dBu is selected by Q112 to Q117, Q122, and Q123 according to the [Line Input Ref] setting
level of the menu, and is input to the balanced input amplifier (IC200, IC201).
Supply of the microphone power +48 V is also switched by switches (Q100 to Q103).
Front MIC input block
Audio signals are sent from the front MIC input 5-pin XLR connector (CN1) on the CN-3738 board through the connector
(CN10) on the MB-1210 board to the AU-360 board.
The MIC input level is switched by switches (Q304 to Q315), and an input level is selected by [Front MICCH1 Ref]
and [Front MIC CH2 Ref] of the menu.
Furthermore, the MIC input level (-30 to -60 dBu/10 dB step, 70 dBu and -60 dBu are same setting) and supply of the
microphone power +48 V are switched by switches (Q300 to Q303).
Input signal selector
Audio signals are selected by the analog switch (IC400 to IC404) based on the side panel switch information, etc.
PXW-X500
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