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Summary of Contents for iWave iW-RainboW-G33M
- Page 1 SMARC SOM Hardware User Guide iW-RainboW-G33M i.MX8M Quad/QuadLite/Dual SMARC System On Module Hardware User Guide DRAFT VERSION SUBJECT TO CHANGE REL0.2 iWave Systems Technologies Pvt. Ltd. Page 1 of 58...
- Page 2 If you are not the intended recipient (or authorized to receive for the recipient), you are hereby notified that any disclosure, copying distribution or use of any of the information contained within this document is STRICTLY PROHIBITED. Thank you. “iWave Systems Tech. Pvt. Ltd.” REL0.2 iWave Systems Technologies Pvt.
- Page 3 No warranty of accuracy is given concerning the contents of the information contained in this publication. To the extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by iWave Systems, its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or inaccuracies in this document.
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Page 4: Table Of Contents
2.8.3 GPIOs ................................39 Other Features ..............................40 2.9.1 Fan Header ..............................40 2.9.2 RTC Controller ............................. 40 2.9.3 JTAG Header (Optional) ..........................41 2.9.4 Debug UART Header (Optional) ........................42 REL0.2 iWave Systems Technologies Pvt. Ltd. Page 4 of 58... - Page 5 3.2.4 Electrostatic Discharge ..........................53 Mechanical Characteristics ..........................54 3.3.1 i.MX8M SMARC SOM Mechanical Dimensions ................... 54 ORDERING INFORMATION .......................... 55 APPENDIX ..............................57 i.MX8M SMARC Development Platform ......................57 REL0.2 iWave Systems Technologies Pvt. Ltd. Page 5 of 58...
- Page 6 Table 10: Power Input Requirement ..........................50 Table 11: Power Sequence Timing ..........................51 Table 12: Power Consumption ............................51 Table 13: Environmental Specification ........................... 52 Table 14: Orderable Product Part Numbers ........................55 REL0.2 iWave Systems Technologies Pvt. Ltd. Page 6 of 58...
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Page 7: Introduction
This document is the Hardware User Guide for the SMARC SOM based on the NXP’s i.MX8M Dual/Quad/QuadLite Application processor. This board is fully supported by iWave Systems Technologies Pvt. Ltd. This Guide provides detailed information on the overall design and usage of the i.MX8M SMARC SOM from a Hardware Systems perspective. - Page 8 Serial Audio Interface Secure Digital SMARC Smart Mobility ARChitecture System On Module To Be Defined UART Universal Asynchronous Receiver/Transmitter Universal Serial Bus USB OTG USB On The Go Wi-Fi Wireless Fidelity REL0.2 iWave Systems Technologies Pvt. Ltd. Page 8 of 58...
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Page 9: Terminlogy Description
Note: Signal Type does not include internal pull-ups or pull-downs implemented by the chip vendors and only includes the pull-ups or pull-downs implemented On-SMARC SOM. References • IMX8MDQLQIEC.pdf • IMX8MDQLQRM.pdf • SMARC Specification V2.0 REL0.2 iWave Systems Technologies Pvt. Ltd. Page 9 of 58... -
Page 10: Important Note
In this signal, BCONFIG_0 is the GPIO functionality which we are using and GPIO1_05 is the GPIO number. Note: The above naming is not applicable for other signals which are not connected to CPU. REL0.2 iWave Systems Technologies Pvt. Ltd. Page 10 of 58... -
Page 11: Architecture And Design
MIPI CSI0,1 I2S x 2 SAI2, SAI5 UART x 2 UART1,UART2 I2C x 4 I2C1, I2C2, I2C3, I2C4 PWM x 2 PWM1, PWM3 Figure 1: i.MX8M SMARC SOM Block Diagram REL0.2 iWave Systems Technologies Pvt. Ltd. Page 11 of 58... -
Page 12: I.mx8M Smarc Som Features
USB 3.0 Host x 1 Ports • USB 2.0 Host x 4Ports (through On-SOM USB Hub) • PCIe x 1 Port • MIPI CSI x 2 Channel (1x2lane and 1x4lane) REL0.2 iWave Systems Technologies Pvt. Ltd. Page 12 of 58... - Page 13 The i.MX8M Support two 4 lane MIPI_CSI interface, but SMARC support only two lane for MIPI_CSI0 over Edge connector. In i.MX8M SMARC SOM remaining two lane of MIPI_CSI0 are connected to Expansion connector. REL0.2 iWave Systems Technologies Pvt. Ltd. Page 13 of 58...
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Page 14: I.mx8M Cpu
SMARC SOM Hardware User Guide i.MX8M CPU iW-RainboW-G33M SMARC SOM can support i.MX8M CPUs from NXP. The i.MX8MFamily consists of three processors: i.MX8M Quad Core, i.MX8M QuadLite & i.MX8M Dual Core. The Major Difference between i.MX8M CPUs are: •... -
Page 15: Pf4210 Pmic
3.3 Voltage. The i.MX8M SMARC SOM supports configurable IO voltage levels for uSDHC1 lines through a GPIO. And the micro SD Connector is physically located on Top side of the i.MX8M SMARC SOM. Note: In default configuration uSDHC1 is used for on board eMMC module. Contact iWave Support team if microSD feature is required. -
Page 16: Qspi Flash (Optional)
QSPI_A controller of the i.MX8M processor and operates at 1.8V Voltage levels. The QSPI flash (U31) memory is physically located on Bottom side of the SMARC SOM. The QSPI can be supported with customised memory size based on the requirement by contacting iWave Support Team. Network & Communiation 2.6.1 Wi-Fi and Bluetooth Interface... -
Page 17: Smarc Pcb Edge Connector
314pin SMARC Edge connector are explained in the following sections. Figure 3: SMARC Edge Connector Number of Pins - : 314 Connector Part - : Not Applicable (On Board PCB Edge connector) Mating Connector - : 91782-3140M-001 from Aces REL0.2 iWave Systems Technologies Pvt. Ltd. Page 17 of 58... -
Page 18: Table 3: Smarc Edge Connector Pinouts
GBE0_LINK100# GBE1_MDI1- GBE0_LINK1000# GBE1_LINK1000# GBE0_MDI2- GBE1_MDI2+ GBE0_MDI2+ GBE1_MDI2- GBE0_LINK_ACT# GBE0_MDI1- GBE1_MDI3+ GBE0_MDI1+ GBE1_MDI3- VPHY0_DVDDL GBE0_MDI0- GBE0_MDI0+ GBE1_LINK_ACT# SDIO_WP SMARC_SD_CMD SDIO_CD# USB_HUB3OUT_DP SMARC_SD_CLK USB_HUB3OUT_DM GPIO_SDIO_PWR_EN(GPIO2_19) VBUS_OTG SAI2_MCLK SMARC_SD_DATA0 SAI2_TXFS SMARC_SD_DATA1 SAI2_TXD0 REL0.2 iWave Systems Technologies Pvt. Ltd. Page 18 of 58... - Page 19 QSPI_B_DATA3(NAND_DATA07) QSPI_B_DATA1(NAND_DATA05) GPIO_QSPI_RST(GPIO3_15) USB_HUB4OUT_DP USB0_DP* USB_HUB4OUT_DM USB0_DM* USB0_EN_OC USB1_TX_P VBUS_OTG* USB1_TX_N USB0_OTG_ID USB_HUB1OUT_DP USB1_RX_P USB_HUB1OUT_DM USB1_RX_N USB_HUB1_OC USB3_DP USB_HUB2OUT_DP USB3_DM USB_HUB2OUT_DM USB2_EN_OC USB2_TX_P USB2_TX_N USB3_EN_OC USB2_RX_P USB2_RX_N GPIO_PCIE_RST_3V3(GPIO5_4) GPIO_PCIE_RST_3V3(GPIO5_4)* USB_HUB3_OC REL0.2 iWave Systems Technologies Pvt. Ltd. Page 19 of 58...
- Page 20 S111 SMARC_GPIO_3(GPIO1_11) P111 S112 SMARC_GPIO_4(GPIO1_10) P112 S113 SMARC_GPIO_5(GPIO1_01) P113 S114 SMARC_GPIO_6(GPIO1_09) P114 S115 SMARC_GPIO_7(GPIO1_06) P115 S116 SMARC_GPIO_8(GPIO1_08) P116 S117 SMARC_GPIO_9(GPIO1_03) P117 S118 SMARC_GPIO_10(GPIO1_07) P118 S119 SMARC_GPIO_11(GPIO1_04) P119 S120 P120 S121 REL0.2 iWave Systems Technologies Pvt. Ltd. Page 20 of 58...
- Page 21 VDD_IN P149 S150 VIN_PWR_BAD# VDD_IN P150 S151 VDD_IN P151 S152 VDD_IN P152 S153 CARRIER_STBY# VDD_IN P153 S154 CARRIER_PWR_ON VDD_IN P154 S155 FORCE_RECOV# VDD_IN P155 S156 VDD_IN P156 S157 TEST# S158 REL0.2 iWave Systems Technologies Pvt. Ltd. Page 21 of 58...
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Page 22: Gigabit Ethernet
GBE0_MDI2+ IO, GBE positive. O, 3.3V CMOS Gigabit Ethernet activity status GBE0_LINK_ACT# 68K PD Note: Connect to Cathode of LED. Gigabit Ethernet MDI differential pair 1 GBE0_MDI1- IO, GBE negative. REL0.2 iWave Systems Technologies Pvt. Ltd. Page 22 of 58... - Page 23 3 negative. Power for the Centre Tap of Mack Jack Power VPHY1_DVDDL connector O, 3.3V CMOS Ethernet Activity status LED GBE1_LINK_ACT# 68K PD Note: Connect to Cathode of LED. REL0.2 iWave Systems Technologies Pvt. Ltd. Page 23 of 58...
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Page 24: Sd Interface
For more details on USB pinouts near SMARC edge connector, refer below table: SMARC SMARC Edge CPU Ball Name/ Signal Type/ Description Pin No. Signal Name Pin Number Termination Note: Optionally connected to USB_OTG1_DP. Note: Optionally connected to USB_OTG1_DM. REL0.2 iWave Systems Technologies Pvt. Ltd. Page 24 of 58... - Page 25 USB3.0 Port3 Transmit Negative. 0.1uf AC coupled USB1_RX_P USB1_RX_P/ I, USB USB3.0 Port3 Receive Positive. USB1_RX_N USB1_RX_N/ I, USB USB3.0 Port3 Receive Negative. USB3_DP USB_OTG1_DP/ IO, USB USB Port3 Data Positive. REL0.2 iWave Systems Technologies Pvt. Ltd. Page 25 of 58...
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Page 26: Pcie Interface
USB_OTG1_ID/ O, 3.3V CMOS Connected to USB3 OTG1 ID. Note: In default configuration OTG2 is connected to Hub, If Two USB3.0 Host is required then contact iWave support team. 2.7.4 PCIe Interface The i.MX8M CPU supports two Lane PCI Express -3.0 (PCIe gen3: 8GHz to get 8GHz baud clock) channels. In i.MX8M... -
Page 27: Mipi Csi Camera
MIPI_CSI1_CLK_N/ I, MIPI MIPI CSI0 differential Clock negative. MIPI_CSI1_DATA0_P MIPI_CSI1_DATA0_P/ I, MIPI MIPI CSI0 differential data lane 0 positive MIPI_CSI1_DATA0_N MIPI_CSI1_DATA0_N/ I, MIPI MIPI CSI0 differential data lane 0 negative REL0.2 iWave Systems Technologies Pvt. Ltd. Page 27 of 58... - Page 28 I, DIFF MIPI CSI1 differential data lane 2 negative MIPI_CSI2_DATA3_P MIPI_CSI2_DATA3_P/ I, DIFF MIPI CSI1 differential data lane 3 positive MIPI_CSI2_DATA3_N MIPI_CSI2_DATA3_N/ I, DIFF MIPI CSI1 differential data lane 3 negative REL0.2 iWave Systems Technologies Pvt. Ltd. Page 28 of 58...
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Page 29: Hdmi Interface
MIPI DSI-compliant peripherals. The MIPI DSI D-PHY is a high frequency, low power, low-cost, source-synchronous, physical layer supporting the MIPI Alliance standard for D-PHY. For more details on DSI pinouts, refer below table: REL0.2 iWave Systems Technologies Pvt. Ltd. Page 29 of 58... -
Page 30: Audio Interface
For more details on SMARC Edge I2S pinouts on SAMRC Edge connector, refer below table: REL0.2 iWave Systems Technologies Pvt. Ltd. Page 30 of 58... -
Page 31: Spi Interface
IO, 1.8V CMOS QSPI DATA 1 Lane. QSPI_B_DATA2(NAND_DATA06) NAND_DATA06/ IO, 1.8V CMOS QSPI Data 3 Lane. QSPI_B_DATA3(NAND_DATA07) NAND_DATA07/ IO, 1.8V CMOS QSPI Data 2 Lane. GPIO_QSPI_RST(GPIO3_15) QSPI1A_DQS/ O, 1.8V CMOS QSPI RESET. REL0.2 iWave Systems Technologies Pvt. Ltd. Page 31 of 58... -
Page 32: Data Uart
Note: its optionally connected UART4 Transmitter by default used for Bluetooth module P137 UART1_RX/ I, 1.8V CMOS AT44 Note: its optionally connected UART4 Transmitter by default used for Bluetooth module REL0.2 iWave Systems Technologies Pvt. Ltd. Page 32 of 58... -
Page 33: Smarc Gpios
IO, 1.8V CMOS SMARC General Purpose Input/output 9 P118 SMARC_GPIO_10(GPIO1_07) GPIO1_07/ IO, 1.8V CMOS SMARC General Purpose Input/output 10 P119 SMARC_GPIO_11(GPIO1_04) GPIO1_04/ IO, 1.8V CMOS SMARC General Purpose Input/output 11 REL0.2 iWave Systems Technologies Pvt. Ltd. Page 33 of 58... -
Page 34: Power Control & Management Signals
10K Pull Up. S147 VDD_3V0 I, 3V Power 3V coin cell input for RTC. P147, P148, P149, VDD_IN I, 5V Power Supply Voltage. P150, P151, P152, P153. P154, P155, P156 REL0.2 iWave Systems Technologies Pvt. Ltd. Page 34 of 58... - Page 35 SMARC SOM Hardware User Guide CPU Ball SMARC Edge Signal Type/ SMARC Pin No. Name/ Description Signal Name Termination Pin Number P2,P9,P12,P15,P18, Power Ground. P32,P38,P47P50,P53, P59,P68,P79,P82P85, P88,P91,P94,P97, P100,P103,P120,P133, P142,S3,S10,S13,S16, S25,S34,S47,S61,S64, S67,S70,S73,S80,S83, S86,S89,S92,S101, S119,S124,S130,S143, S158 REL0.2 iWave Systems Technologies Pvt. Ltd. Page 35 of 58...
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Page 36: Expansion Connector
Table 4: Expansion Connector Pinouts Expansion Expansion Signal Signal Connector Pin Connector Pin SAI1_TXD0 SAI1_TXD6 SAI1_TXD2 SAI1_TXD3 SAI1_TXD4 SAI1_TXD5 SAI1_TXD7 SAI1_TXD1 SAI1_TXFS SAI1_TXC GPIO_BCONFIG_0(GPIO3_2) SAI1_RXD0 SAI1_RXD1 SAI1_RXD2 SAI1_RXD5 SAI1_RXD4 SAI1_RXD7 SAI1_RXD3 SAI1_RXFS SAI1_RXD6 SAI1_RXC REL0.2 iWave Systems Technologies Pvt. Ltd. Page 36 of 58... - Page 37 SMARC SOM Hardware User Guide Expansion Expansion Signal Signal Connector Pin Connector Pin GPIO_BCONFIG_3(GPIO5_2) GPIO_BCONFIG_2(GPIO4_29) GPIO_BCONFIG_1(GPIO4_28) GPIO_BCONFIG_4(GPIO4_22) MIPI_CSI1_DATA2_P MIPI_CSI1_DATA2_N MIPI_CSI1_DATA3_P MIPI_CSI1_DATA3_N GPIO_BCONFIG_5(GPIO4_21) HDMI_CEC CLK1_P GPIO_BCONFIG_6(GPIO3_14) CLK1_N REL0.2 iWave Systems Technologies Pvt. Ltd. Page 37 of 58...
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Page 38: Sai Interface
I, 1.8V CMOS/ SAI1 Receiver Data 3. 10K PD SAI1_RXD4 SAI1_RXD4/ I, 1.8V CMOS/ SAI1 Receiver Data 4. 10K PD SAI1_RXD5 SAI1_RXD5/ I, 1.8V CMOS/ SAI1 Receiver Data 5. 10K PD REL0.2 iWave Systems Technologies Pvt. Ltd. Page 38 of 58... -
Page 39: Mipi Csi Camera Interface
I, MIPI MIPI CSI0 differential data lane 3 MIPI_CSI1_D3_N/ negative. 2.8.3 GPIOs Refer GPIO Column under “i.MX8M Pin Multiplexing on Expansion Connector” for details on GPIO options available from Expansion connector. REL0.2 iWave Systems Technologies Pvt. Ltd. Page 39 of 58... -
Page 40: Other Features
The i.MX8M SMARC SOM by supports external RTC Controller “PCF85263AT/AJ” using I2C1 interface. In SOM power off condition, this device will take power from SAMRC Edge (VDD_RTC) coin cell power input (Pin S147) and continues to keep the current date & time. REL0.2 iWave Systems Technologies Pvt. Ltd. Page 40 of 58... -
Page 41: Jtag Header (Optional)
JTAG test data output. Power Ground. RESET_IN# I, 1.8V CMOS/ Reset input. 10K PU Power Ground. Only pull up is provided. Power Ground. Only pull down is provided. Power Ground. REL0.2 iWave Systems Technologies Pvt. Ltd. Page 41 of 58... -
Page 42: Debug Uart Header (Optional)
Table 7: Debug UART Header Pin Out (Optional) Signal Type/ Pin No Pin Name Signal Name Description Termination UART1_TXD / UART1_TXD O, 1.8V CMOS Debug UART Transmitter UART1_RXD/ UART1_RXD I, 1.8V CMOS Debug UART Receiver. Power Ground REL0.2 iWave Systems Technologies Pvt. Ltd. Page 42 of 58... -
Page 43: I.mx8M Pinmultiplexing On Smarc Edge
This table has been prepared by referring NXP’s i.MX8M Hardware User’s Manual. Important Note: It is strongly recommended to use the pin function same as selected in the SMARC SOM Edge connector for iWave’s BSP reusability and to have compatible SMARC modules in future for upgradability. - Page 44 HDMI_TX_N_LN_0 HDMI_TX_N_LN_0 HDMI_TX_P_LN_0 HDMI_TX_P_LN_0 P104 HDMI_HPD HDMI_HPD P105 HDMI_DDC_SCL HDMI_DDC_SCL P106 HDMI_DDC_SDA HDMI_DDC_SDA usdhc2.CLK gpio2.IO[13] gpio2.IO[13] usdhc2.CLK Interface usdhc2.CMD gpio2.IO[14] gpio2.IO[14] usdhc2.CMD usdhc2.DATA0 gpio2.IO[15] gpio2.IO[15] usdhc2.DATA0 usdhc2.DATA1 gpio2.IO[16] gpio2.IO[16] usdhc2.DATA1 REL0.1 iWave Systems Technologies Pvt. Ltd. Page 44 of 58...
- Page 45 USB1_ID USB1_VBUS USB1_VBUS USB1_DP USB1_DP USB1_DN USB1_DN USB1_TX_P USB1_TX_P USB1_TX_N USB1_TX_N USB1_RX_P USB1_RX_P USB1_RX_N USB1_RX_N PCIe PCIE1_TXN_P PCIE1_TXN_P PCIE1_TXN_N PCIE1_TXN_N PCIE1_RXN_N PCIE1_RXN_N PCIE1_RXN_P PCIE1_RXN_P PCIE2_TXN_P PCIE2_TXN_P PCIE2_TXN_N PCIE2_TXN_N PCIE2_RXN_N PCIE2_RXN_N REL0.1 iWave Systems Technologies Pvt. Ltd. Page 45 of 58...
- Page 46 P108 rawnand.READY_B gpio3.IO[16] gpio3.IO[16] gpio3.IO[16] P109 gpio1.IO[12] usb1.OTG_PWR sdma2.EXT_E gpio1.IO[12] gpio1.IO[12] VENT[1] P110 gpio1.IO[15] usb2.OTG_OC pwm4.OUT gpio1.IO[15] gpio1.IO[15] P111 gpio1.IO[11] usb2.OTG_ID ccmsrcgpcmix. gpio1.IO[11] gpio1.IO[11] PMIC_READY P112 gpio1.IO[10] usb1.OTG_ID gpio1.IO[10] gpio1.IO[10] REL0.1 iWave Systems Technologies Pvt. Ltd. Page 46 of 58...
- Page 47 VENT[1] i2c2.SCL enet1.1588_EVENT gpio5.IO[16] gpio5.IO[16] i2c2.SCL 1_IN i2c2.SDA enet1.1588_EVENT gpio5.IO[17] gpio5.IO[17] i2c2.SDA 1_OUT Control P126 sai5.MCLK sai1.TX_BCLK sai4.MCLK gpio3.IO[25] gpio3.IO[25] gpio3.IO[25 S145 gpio1.IO[2] wdog1.WDOG_B wdog1.WDOG wdog1.WDOG_B Signal _ANY REL0.1 iWave Systems Technologies Pvt. Ltd. Page 47 of 58...
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Page 48: I.mx8M Pin Multiplexing On Expansion Connector
LVDS1_CH1_TX2_P sai1.TX_DATA[6] sai6.RX_SYNC sai6.TX_SYNC coresight.TRACE[14] gpio4.IO[18] gpio4.IO[18] LVDS1_CH1_TX3_N sai1.TX_DATA[7] sai6.MCLK coresight.TRACE[15] gpio4.IO[19] gpio4.IO[19] LVDS1_CH1_TX3_P BE25 MIPI_CSI1_D2_P MIPI_CSI1_D2_P BF24 MIPI_CSI1_D2_N MIPI_CSI1_D2_N MIPI CSI0 BE17 MIPI_CSI1_D3_P MIPI_CSI1_D3_P BF16 MIPI_CSI1_D3_N MIPI_CSI1_D3_N REL0.1 iWave Systems Technologies Pvt. Ltd. Page 48 of 58... - Page 49 GPIO sai3.MCLK pwm4.OUT sai5.MCLK gpio5.IO[2] gpio5.IO[2] gpio5.IO[2] sai2.RX_SYNC sai5.TX_SYNC gpio4.IO[21] gpio4.IO[21] gpio4.IO[21] sai2.RX_BCLK sai5.TX_BCLK gpio4.IO[22] gpio4.IO[22] gpio4.IO[22] rawnand.DQS qspi.A_DQS gpio3.IO[14] gpio3.IO[14] gpio3.IO[14] REL0.1 iWave Systems Technologies Pvt. Ltd. Page 49 of 58...
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Page 50: Technical Specification
¹ VDD_IN pin can be powered from either SMRAC Carrier Card or External power source. 3.1.1 Power Input Sequencing The i.MX8M SMARC SOM’s Power Input sequence requirement is explained below. Figure 5: Power Input Sequencing REL0.2 iWave Systems Technologies Pvt. Ltd. Page 50 of 58... -
Page 51: Power Consumption
FileTransfer - Transfer 1GB file between all storage devices • Run the Dhrystone dry2 application ¹ Power consumption measurements have been done in i.MX8M Quad based SMARC SOM (iW-G33M-SCMQ-4L002G- E008G-LIA) with iWave’s Linux4.9.51 BSP (iW-PRFSZ-SC-01-R1.0-REL1.0-Linux4.9.51). REL0.2 iWave Systems Technologies Pvt. Ltd. Page 51 of 58... -
Page 52: Environmental Characteristics
Heat spreader has to be used with application specific thermal solutions like heat sinks, Chassis, fans, Heat pipes etc. Note: iWave supports Heat Sink Solution for i.MX8M SMARC SOM. For more information on Heat Sink contact iWave support team. Do not Power On the SOM without a proper thermal solution. mm REL0.2... -
Page 53: Rohs Compliance
3.2.4 Electrostatic Discharge iWave’s i.MX8M SMARC SOM is sensitive to electro static discharge and so high voltages caused by static electricity could damage some of the devices on board. It is packed with necessary protection while shipping. Do not open or use the SOM except at an electrostatic free workstation. -
Page 54: Mechanical Characteristics
(3.95mm) followed by RTC Controller (1.75mm). Please refer the below figure which gives height details of the i.MX8M SMARC SOM. Figure 8: Mechanical dimension of i.MX8M SMARC SOM- Side View REL0.2 iWave Systems Technologies Pvt. Ltd. Page 54 of 58... -
Page 55: Ordering Information
The below table provides the standard orderable part numbers for different i.MX8M SMARC SOM variations. Please contact iWave for orderable part number of higher RAM memory size or Flash memory size SOM configurations. Also, if the desired part number is not listed in below table or if any custom configuration part number is required, please contact iWave. - Page 56 WiFi, BT & Expansion Connector - Android Important Note: Some of the above-mentioned Part Number is subject to MOQ purchase. Please contact iWave for further details. For SOM identification purpose, Product Part Number and SOM Unique Serial Number are pasted as Label with Barcode readable format on SOM REL0.2...
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Page 57: Appendix
5. APPENDIX i.MX8M SMARC Development Platform iWave Systems supports iW-RainboW-G33D-i.MX8M SMARC Development Platform which is targeted for quick validation of i.MX8M CPU based SMARC SOM and its features. Being a Nano-ITX form factor with 120mm x 120mm size, the carrier board is highly packed with all necessary interfaces & on-board connectors to validate complete SMARC supported features. - Page 58 SMARC SOM Hardware User Guide REL0.2 iWave Systems Technologies Pvt. Ltd. Page 58 of 58...
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