Quectel EG21-G Reference Design page 16

6
D
R0502
0R
VDD_1V8
R0503 0R
C0504
4.7μF
C
C0513
MICBIAS
[7] MIC+
[7] MIC-
R0509
[3,8] CODEC_PCM_OUT
R0511
[3,8] CODEC_PCM_IN
R0513
[3,8]
CODEC_PCM_CLK
R0515
[3,8] CODEC_PCM_SYNC
C0525
NM
B
VDD_3.3V
Notes:
1. ALC5616 power-on sequence: DBVDD/I2C pull-up power/AVDD/DACREF/CPVDD -> MICVDD -> software initialization.
2. ALC5616 power-off sequence: close codec function by software -> MICVDD -> DBVDD/I2C pull-up power/AVDD/DACREF/CPVDD.
3. EG21-G will automatically initialize the codec via I2C interface after it is turned on successfully, so all power supplies for the codec need to be powered on before that.
4. Pin AGND and DGND of ALC5616 are connected together through 0R resisitor R0703.
5. The maximum output power of the codec is 30mW when the headphone driver with 32Ω load is used.
A
6
5
Audio Codec Design (ALC5616)
R0504
R0501
0R 0R
C0501 C0502 C0503
C0505 C0506
4.7μF 100nF
NM_33pF
4.7μF 100nF
4.7μF R0507
32 MICBIAS1
0R 2 IN1P/DMC_DAT
3 IN2P
4 IN2N/JD2
HPO_R
U0501
HPO_L
25 MCLK
ALC5616
0R
22 DACDAT1
LOUTL/P
0R
21 ADCDAT1
LOUTR/N
0R
24 BCLK1
0R
23 LRCK1
CPVPP
C0526 C0527 CPVEE
CPVREF
NM NM
VREF2
28 GPIO1/IRQ1
1 JD1
R0516
NM_10K
5
4
14 C0514 2.2μF
CPP1
13
CPN1
C0516 2.2μF
12
CPP2
11
CPN2
R0519 C0518 1μF
17 0R
SPK_R
C0520 1μF
20 R0520 0R
SPK_L
9 R0510 0R C0521 1μF
SPK_P
R0512 0R C0522 1μF
10
SPK_N
C0523 2.2μF
16
C0524 2.2μF
19
18
C0528 4.7μF
8
27
SDA [3,8]
I2C_SDA
26
SCL I2C_SCL [3,8]
R0518
R0517
4.7K
4.7K
VDD_1V8
3
4
3 2
MICBIAS
R0505
1K
R0506
1.5K
[8,9] MIC_P
[8,9] MIC_N
[8,9]
[8,9]
R0508
[8,9]
1.5K
[8,9]
R0514
1K
DRAWN BY
Lorry XU
CHECKED BY
Woody WU
2
1
C0515 2.2μF
[7]
MIC+
C0517 2.2μF
[7]
MIC-
C0519
10μF
Quectel Wireless Solutions
PROJECT TITLE
EG21-G Reference Design
VER
SIZE
A2 1.0
SHEET 7 OF 14 DATE 2019/12/5
1
D
C
B
A