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Quectel BG950A-GL Manual

Quectel BG950A-GL Manual

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BG950A-GL&BG951A-GL
Hardware Design
LPWA Module Series
Version: 1.0.1
Date: 2021-11-04
Status: Preliminary

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Summary of Contents for Quectel BG950A-GL

  • Page 1 BG950A-GL&BG951A-GL Hardware Design LPWA Module Series Version: 1.0.1 Date: 2021-11-04 Status: Preliminary...
  • Page 2 LPWA Module Series At Quectel, our aim is to provide timely and comprehensive services to our customers. If you require any assistance, please contact our headquarters: Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai...
  • Page 3 Except as otherwise set forth herein, nothing in this document shall be construed as conferring any rights to use any trademark, trade name or name, abbreviation, or counterfeit product thereof owned by Quectel or any third party in advertising, publicity, or other aspects.

  • Page 4: Safety Information

    Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers’ failure to comply with these precautions.

  • Page 5: About The Document

    Updated pin 76 from RESERVED into GNSS_NRST; Updated pin 97 from RESERVED into GNSS_EN; Updated pin 98 from RESERVED into SFNIND_1PPS. 2. Added the weight of BG950A-GL&BG951A-GL (Table 2). Lex LI/ 3. Added the GNSS function description of BG951A-GL 1.0.1...
  • Page 6 NET_STATUS and STATUS (Figure 22&Figure 23&Figure 24). 14. Added the description of GNSS layout guidelines (Chapter 5.3). 15. Updated the power consumption of BG950A-GL (Chpater 6.3). 16. Added the top views of BG951A-GL (Chapter 7.3) 17. Updated the packaging specifications (Chpater 8.3).

  • Page 7: Table Of Contents

    Turn off the Module with AT Command and PON_TRIG.............35 3.10. Reset..............................36 3.11. PON_TRIG............................38 Application Interfaces.............................40 4.1. (U)SIM Interface........................... 40 4.2. Interface*............................42 4.3. UART Interfaces........................... 44 4.4. PCM and I2C Interfaces*........................47 4.5. Interfaces............................48 BG950A-GL&BG951A-GL_Hardware_Design 6 / 84...
  • Page 8 Recommended Footprint........................74 7.3. Top and Bottom Views.........................75 Storage, Manufacturing & Packaging......................76 8.1. Storage Conditions..........................76 8.2. Manufacturing and Soldering......................77 8.3. Packaging Specifications........................78 8.3.1. Carrier Tape..........................78 8.3.2. Plastic Reel..........................79 8.3.3. Packing Process.........................80 Appendix References............................81 BG950A-GL&BG951A-GL_Hardware_Design 7 / 84...
  • Page 9 LPWA Module Series Table Index Table 1: Special Mark..............................11 Table 2: Brief Introduction of BG950A-GL & BG951A-GL Modules..............12 Table 3: Wireless Network Type..........................13 Table 4: Key Features............................... 13 Table 5: I/O Parameters Definition..........................19 Table 6: Pin Description............................20 Table 7: Overview of Operating Modes........................26...
  • Page 10 LPWA Module Series Table 42: BG950A-GL Power Consumption......................66 Table 43: BG951A-GL Power Consumption......................68 Table 44: BG950A-GL GNSS Current Consumption...................70 Table 45: BG951A-GL GNSS Current Consumption...................70 Table 46: Electrostatics Discharge Characteristics (Temperature: 25 °C, Humidity: 45 %)......71 Table 47: Operating and Storage Temperatures....................
  • Page 11 Figure Index Figure 1: Functional Diagram of BG950A-GL.......................16 Figure 2: Functional Diagram of BG951A-GL.......................17 Figure 3: Pin Assignment of BG950A-GL & BG951A-GL (Top View)............... 18 Figure 4: Sleep Mode Application via UART Interface..................30 Figure 5: Power Supply Limits During Burst Transmission................

  • Page 12: Introduction

    LPWA Module Series Introduction This document defines BG950A-GL & BG951A-GL modules and describes their air interfaces and hardware interfaces which connected to your applications. It can help you quickly understand interface specifications, electrical and mechanical details, as well as other related information of the module. Associated with application notes and user guides, makes it easy to design and to set up mobile applications with the module.

  • Page 13: Product Overview

    LPWA Module Series Product Overview BG950A-GL/BG951A-GL module is an embedded IoT (LTE Cat M1, LTE Cat NB1/Cat NB2*) wireless communication module. It provides data connectivity on LTE HD-FDD network, and supports half-duplex operation in LTE network. It also provides GNSS and...

  • Page 14: Frequency Bands And Functions

    B20/B25/B28/B66 NOTE Please noted that BG950A-GL integrates the GNSS function inside the baseband chip, while for BG951A-GL, the internal baseband chip and GNSS chip are separated. Therefore, BG950A-GL does not support concurrent operation of LTE and GNSS, however, LTE and GNSS are concurrency for BG951A-GL.
  • Page 15 115200 bps baud rate by default  Network Indication NET_STATUS to indicate network connectivity status. 3GPP TS 27.007 and 3GPP TS 27.005 AT commands  AT Commands Quectel enhanced AT commands  Main antenna interface (ANT_MAIN)  Antenna Interface GNSS antenna interface (ANT_GNSS) ...

  • Page 16: Functional Diagram

    Support PPP/TCP/UDP/SSL/MQTT/FTP(S)/HTTP(S)/LwM2M/IPv4/IPv6/  Internet Protocol TLS/DTLS/PING/CoAP/NITZ protocols Features Supports PAP and CHAP for PPP connections  BG950A-GL: supports GPS, GLONASS  GNSS Features BG951A-GL: supports GPS, GLONASS, BeiDou, Galileo, QZSS, SBAS  Operating temperature range : -35 to +75 °C ...
  • Page 17 LPWA Module Series Figure 1: Functional Diagram of BG950A-GL BG950A-GL&BG951A-GL_Hardware_Design 16 / 84...
  • Page 18 LPWA Module Series Figure 2: Functional Diagram of BG951A-GL NOTE PCM and I2C interfaces are used for VoLTE* only. BG950A-GL&BG951A-GL_Hardware_Design 17 / 84...

  • Page 19: Pin Assignment

    LPWA Module Series 2.4. Pin Assignment The following figure illustrates the pin assignment of BG950A-GL and BG951A-GL. Figure 3: Pin Assignment of BG950A-GL & BG951A-GL (Top View) BG950A-GL&BG951A-GL_Hardware_Design 18 / 84...

  • Page 20: Pin Description

    SFNIND_1PPS (pin 98). For BG950A-GL, pin 27 and pin 28 can only be used as CLI UART interface. When pin 27 and pin 28 are used as CLI_TXD and CLI_RXD, the two pins should be connected to pin 95 and pin 94 respectively inside the module.
  • Page 21 Comment USB_VBUS USB connection detect Vnom = 5.0 V Typical 5.0 V Compliant with USB USB_DP USB differential data (+) Vmax = 4.1 V 2.0 standard Vmin = -0.2 V USB_DM USB differential data (-) specification. BG950A-GL&BG951A-GL_Hardware_Design 20 / 84...
  • Page 22 MAIN_RTS signal from DCE min = 1.26 V (Connect to DTE’s RTS) max = 2.0 V Main UART data carrier MAIN_DCD detect max = 0.36 V Main UART ring min = 1.44 V MAIN_RI* indication BG950A-GL&BG951A-GL_Hardware_Design 21 / 84...
  • Page 23 PCM data output min = 1.44 V For BG950A-GL module, pin 27 and pin 28 can only be used as CLI UART interface. When pin 27 and pin 28 are used as Interface* CLI_TXD and CLI_RXD, the two pins should be connected to pin 95 and pin 94 respectively inside the module. For BG951A-GL module, pin 27 and pin 28 can only be used as GNSS UART interface.
  • Page 24 = 1.26 V these pins open. GPIO6 max = 2.0 V GPIO7 GPIO8 GPIO9 ADC Interfaces Pin Name Description DC Characteristics Comment General-purpose ADC Voltage range: If unused, keep ADC0 interface 0–1.8 V them open. BG950A-GL&BG951A-GL_Hardware_Design 23 / 84...
  • Page 25 Reset input signal of the GNSS_NRST max = 0.54 V domain. GNSS chip min = 1.26 V If unused, keep this Only BG951A-GL supports GNSS_BOOT (pin 75), GNSS_NRST (pin 76), GNSS_EN (pin 97), SFNIND_1PPS (pin 98). BG950A-GL&BG951A-GL_Hardware_Design 24 / 84...

  • Page 26: Evb

    Keep all RESERVED pins and unused pins unconnected. 2.6. EVB To help customers to develop applications with the module conveniently, Quectel supplies an evaluation board (EVB), USB to RS-232 converter cables USB data cables, earphone, antennas, and other peripherals to control or to test the module. For more details, see document [1].

  • Page 27: Operating Characteristics

    PDN connections. The current (PSM) consumption is reduced to a minimized level. The module can burn firmware with an empty serial flash, or recover from Recovery Mode firmware malfunction. For more details, see Chapter 3.6. BG950A-GL&BG951A-GL_Hardware_Design 26 / 84...

  • Page 28: Airplane Mode

    AT+QCFG="airplanecontrol". For more details of the command, see document [2]. 2. For BG950A-GL, the execution of AT+CFUN will affect GNSS function. Since the module does not support concurrent operation of WWAN and GNSS, the GNSS function can be used when <fun>=0 or 4, but cannot be used when <fun>=1.

  • Page 29: Extended Idle Mode Drx (E-I-Drx)

    EPC rejected its request or because the request was received by EPC not supporting e-I-DRX, the UE shall apply its regular discontinuous reception. If e-I-DRX is supported by the network, perform the steps below in sequence to let the module enter BG950A-GL&BG951A-GL_Hardware_Design 28 / 84...

  • Page 30: Sleep Mode

    Follow the steps for exiting sleep mode to exit e-I-DRX. 3.5. Sleep Mode BG950A-GL/BG951A-GL can reduce their current consumption to a lower value during the sleep mode. The following sub-chapter describes the power saving procedures of BG950A-GL & BG951A-GL. 3.5.1. UART Application Scenario If the host communicates with the module via main UART interface, perform the steps below in sequence to let the module enter sleep mode, in which case the main UART interface is not accessible.

  • Page 31: Recovery Mode

    After the module enters recovery mode successfully, disconnect the connection between DBG_TXD and DBG_RXD. Upgrade firmware via debug UART interface. NOTE 1. In the design, it is recommended to reserve all the test points of the debug UART interface, and keep DBG_TXD close to DBG_RXD. BG950A-GL&BG951A-GL_Hardware_Design 30 / 84...

  • Page 32: Power Supply

    2.2 V. 3.7.2. Voltage Stability Requirements The power supply range of the module is from 2.2 V to 4.35 V. Make sure the input voltage will never drop below 2.2 V. BG950A-GL&BG951A-GL_Hardware_Design 31 / 84...
  • Page 33 0.6 A at least, and it is recommended to select a DC-DC converter chip or an LDO chip with ultra-low leakage current and current output no less than 1.0 A for the power supply design. BG950A-GL&BG951A-GL_Hardware_Design 32 / 84...

  • Page 34: Power Supply Monitoring

    Another way to control the PWRKEY is by using a button directly. When pressing the button, an electrostatic strike may generate from fingers. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection. BG950A-GL&BG951A-GL_Hardware_Design 33 / 84...
  • Page 35 3. Ensure that VBAT is stable for at least 100 ms before pulling down the PWRKEY. 4. Pull PON_TRIG high before the module is turned on, and then drive PWRKEY low for 500–1000 ms and release, otherwise, the main UART interface will be inaccessible. BG950A-GL&BG951A-GL_Hardware_Design 34 / 84...

  • Page 36: Turn Off

    It is also a safe way to use AT+QPOWD to turn off the module, which is similar to turning off the module with PWRKEY. After the AT+QPOWD is sent, pull down PON_TRIG within 200 ms, and the module will execute the power-down procedure. See document [3] for details about AT+QPOWD. BG950A-GL&BG951A-GL_Hardware_Design 35 / 84...

  • Page 37: Pon_Trig

    Pin No. Description Reset the module. RESET_N Internally pulled up with a 470 kΩ resistor. The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control RESET_N. BG950A-GL&BG951A-GL_Hardware_Design 36 / 84...
  • Page 38 LPWA Module Series Figure 12: Reference Circuit of RESET_N with Driving Circuit Figure 13: Reference Circuit of RESET_N with a Button The reset timing is illustrated in the following figure. Figure 14: Reset Timing BG950A-GL&BG951A-GL_Hardware_Design 37 / 84...

  • Page 39: Pon_Trig

    LPWA Module Series NOTE Ensure that there is no large capacitance on RESET_N pin. 3.11. PON_TRIG BG950A-GL & BG951A-GL modules provide one PON_TRIG pin which is used to wake up the module from PSM. Table 11: Pin Definition of PON_TRIG Pin Name Pin No.
  • Page 40 After sending AT+QPSMS to enable PSM, driving PON_TRIG low will set the module into PSM.  Drive PON_TRIG high and remain it high, the module will wake up from PSM. In this case, PON_TRIG must remain high, otherwise the module will re-enter PSM. BG950A-GL&BG951A-GL_Hardware_Design 39 / 84...

  • Page 41: Application Interfaces

    LPWA Module Series Application Interfaces 4.1. (U)SIM Interface BG950A-GL/BG951A-GL support 1.8 V (U)SIM card only. The circuitry of (U)SIM interfaces meet ETSI and IMT-2000 requirements. Table 12: Pin Definition of (U)SIM Interface Pin Name Pin No. Description Comment 1.8 V power domain.
  • Page 42 (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure. Figure 17: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector To enhance the reliability and availability of the (U)SIM card in applications, follow the criteria below in the (U)SIM circuit design: BG950A-GL&BG951A-GL_Hardware_Design 41 / 84...

  • Page 43: Usb Interface

    4.2. USB Interface* BG950A-GL/BG951A-GL provides one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0 specification and supports full speed mode only. USB interface is used AT command communication, data transmission, software debugging and firmware upgrade.
  • Page 44 For more details about the USB specifications, visit http://www.usb.org/home. NOTE After the module is turned off or enters PSM, do not pull up any pin of USB interface. Otherwise, the module will have additional power consumption and may have damaged pins. BG950A-GL&BG951A-GL_Hardware_Design 43 / 84...

  • Page 45: Uart Interfaces

    CLI/GNSS UART:  For BG950A-GL module, this interface can only be used as CLI UART interface. And pin 27 and pin 28 should be connected to pin 95 and pin 94 respectively inside the module. For BG951A-GL module, this interface can only be used as GNSS UART interface. The GNSS UART interface supports 115200 bps baud rate by default, and it is used for GNSS data and NMEA sentences output.
  • Page 46 3.3 V UART interface. It is recommended to use a level-shifting chip without internal pull-up. The voltage-level translator TXB0108PWR provided by Texas Instruments is recommended. The following figure shows a reference design of the main UART interface: BG950A-GL&BG951A-GL_Hardware_Design 45 / 84...
  • Page 47 The main UART interface of the module should be disconnected in PSM and power off modes. Otherwise, the module will have additional power consumption and may have damaged pins. It is recommended to use a level-shifting chip without internal pull-up, such as TXB0108PWR, for voltage level translation. BG950A-GL&BG951A-GL_Hardware_Design 46 / 84...

  • Page 48: Pcm And I2C Interfaces

    I2C serial clock I2C_SCL Require external pull-up to 1.8 V only. (for external codec) If these pins are unused, keep them I2C serial data open. I2C_SDA (for external codec) The reference design is illustrated as follows: BG950A-GL&BG951A-GL_Hardware_Design 47 / 84...

  • Page 49: Adc Interfaces

    AT+QADC=1: read the voltage value on ADC1  For more details about the AT command, see document [3]. The resolution of the ADC is up to 12 bits. The following table describes the characteristic of the ADC interfaces. BG950A-GL&BG951A-GL_Hardware_Design 48 / 84...

  • Page 50: Indication Signals

    When PSM is enabled, the function of PSM_IND will be activated after the module is rebooted. When PSM_IND is in high level, the module is in normal operation state. When it is in low level, the module is in PSM. BG950A-GL&BG951A-GL_Hardware_Design 49 / 84...

  • Page 51: Network Status Indication

    Pin Name Status Description Flicker slowly (200 ms High/1800 ms Low) Network searching Flicker slowly (1800 ms High/200 ms Low) Idle NET_STATUS Flicker quickly (125 ms High/125 ms Low) Data transfer is ongoing Always high Voice calling* BG950A-GL&BG951A-GL_Hardware_Design 50 / 84...

  • Page 52: Status

    Table 25: Pin Definition of STATUS Pin Name Pin No. Description Comment STATUS Indicate the module’s operation status 1.8 V power domain A reference circuit is shown as below. Figure 24: Reference Circuits of STATUS BG950A-GL&BG951A-GL_Hardware_Design 51 / 84...

  • Page 53: Main_Ri

    The module provides two generic RF control interfaces for the control of external antenna tuners. Table 28: Pin Definition of GRFC Interfaces Pin Name Pin No. Description Comment 1.8 V power domain. GRFC1 Generic RF controller If these pins are unused, keep them GRFC2 Generic RF controller open. BG950A-GL&BG951A-GL_Hardware_Design 52 / 84...

  • Page 54: Gpio Interface

    Frequency Range (MHz) Band High High 4.8. GPIO Interface* BG950A-GL/BG951A-GL module provides nine general-purpose input and output (GPIO) interfaces. " " AT+QCFG= gpio can be used to configure the status of GPIO pins. For more details about the AT command, see document [2].

  • Page 55: Rf Specifications

    Pin No. Description Comment ANT_MAIN Main antenna interface 50 Ω impedance  NOTE Only passive antennas are supported. Table 32: Operating Frequency of BG950A-GL & BG951A-GL Operating Frequency Transmit (MHz) Receive (MHz) Unit LTE HD-FDD B1 1920–1980 2110–2170 LTE HD-FDD B2 1850–1910...

  • Page 56: Tx Power

    Min. Tx Power LTE HD-FDD: B1/B2/B3/B4/B5/B8/B12/B13/B17 /B18/B19/ 23 dBm ±2.7 dB < -39 dBm B20/B25/B26 /B27 /B28/B66 LTE HD-FDD B17 is supported by Cat NB2* only. LTE HD-FDD B26 and B27 are supported by Cat M1 only. BG950A-GL&BG951A-GL_Hardware_Design 55 / 84...

  • Page 57: Rx Sensitivity

    LPWA Module Series 5.1.3. Rx Sensitivity The following table shows conducted Rx sensitivity of the module. Table 34: Conducted RF Receiving Sensitivity of BG950A-GL Sensitivity (dBm) Frequency Band Primary Diversity Cat M1/3GPP Cat NB1 /3GPP LTE HD-FDD B1 TBD/-102.3 TBD/-107.5 LTE HD-FDD B2 TBD/-100.3...

  • Page 58: Reference Design

    It is recommended to reserve a π-type matching circuit for better RF performance, and the π-type matching components (R1, C1 and C2) should be placed as close to the antenna as possible. The capacitors are not mounted by default. LTE Cat NB2* receiving sensitivity without repetitions. BG950A-GL&BG951A-GL_Hardware_Design 57 / 84...

  • Page 59: Gnss

    By default, the module’s GNSS is switched off. It must be switched on via AT command. BG950A-GL does not support concurrent operation of LTE and GNSS, however, LTE and GNSS are engine concurrency for BG951A-GL. For more details about GNSS technology and configurations, see document [4].

  • Page 60: Gnss Performance

    2. Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock within 3 minutes after loss of lock. 3. Cold start sensitivity: the minimum GNSS signal power at which the module can fix position successfully within 3 minutes after executing cold start command. BG950A-GL&BG951A-GL_Hardware_Design 59 / 84...

  • Page 61: Reference Design

    The following is the reference circuit of GNSS antenna. Figure 26: Reference Circuit of GNSS Antenna NOTE BG950A-GL/BG951A-GL module is designed with a passive antenna. 5.3. Layout Guidelines The following layout guidelines should be taken into account in application designs.

  • Page 62: Rf Routing Guidelines

    (S). Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance. The following are reference designs of microstrip or coplanar waveguide with different PCB structures. Figure 27: Microstrip Design on a 2-layer PCB Figure 28: Coplanar Waveguide Design on a 2-layer PCB BG950A-GL&BG951A-GL_Hardware_Design 61 / 84...
  • Page 63 RF traces should be no less than two times the width of RF signal traces (2 × W). Keep RF traces away from interference sources, and avoid intersection and paralleling between  traces on adjacent layers. For more details about RF layout, see document [5]. BG950A-GL&BG951A-GL_Hardware_Design 62 / 84...

  • Page 64: Antenna Design Requirements

    < 1.5 dB: MB (1–2.3 GHz) 5.6. RF Connector Recommendation If RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connectors provided by HIROSE. Figure 31: Dimensions of the U.FL-R-SMT Connector (Unit: mm) BG950A-GL&BG951A-GL_Hardware_Design 63 / 84...
  • Page 65 U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 32: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 33: Space Factor of Mated Connector (Unit: mm) For more details, visit http://www.hirose.com. BG950A-GL&BG951A-GL_Hardware_Design 64 / 84...

  • Page 66: Reliability And Electrical

    Table 41: The Module’s Power Supply Ratings Parameter Description Conditions Min. Typ. Max. Unit Power supply for the The actual input voltages must VBAT_BB/ module’s baseband stay between the minimum and 4.35 VBAT_RF part/RF part maximum values. USB connection USB_VBUS detect BG950A-GL&BG951A-GL_Hardware_Design 65 / 84...

  • Page 67: Power Consumption

    LPWA Module Series 7.3. Power Consumption Table 42: BG950A-GL Power Consumption BG950A-GL (Power Supply: 3.3 V, Room Temperature) Description Conditions Avg. Max. Unit Leakage Power-off @ USB/UART disconnected 1.35 μA PSM @ USB/UART disconnected 1.43 μA Rock bottom AT+CFUN=0 @ Sleep mode μA...
  • Page 68 LTE HD-FDD B18 @ 23.19 dBm 166.79 425.41 LTE HD-FDD B19 @ 22.61 dBm 174.28 461.28 LTE HD-FDD B20 @ 22.71 dBm 174.52 443.72 LTE HD-FDD B25 @ 23.36 dBm 200.58 512.86 LTE HD-FDD B28 @ 23.12 dBm 176.39 446.66 BG950A-GL&BG951A-GL_Hardware_Design 67 / 84...
  • Page 69 LTE HD-FDD B2 @ dBm LTE HD-FDD B3 @ dBm LTE Cat M1 data transfer LTE HD-FDD B4 @ dBm (GNSS OFF) LTE HD-FDD B5 @ dBm LTE HD-FDD B8 @ dBm LTE HD-FDD B12 @ dBm BG950A-GL&BG951A-GL_Hardware_Design 68 / 84...
  • Page 70 (GNSS OFF) LTE HD-FDD B17 @ dBm LTE HD-FDD B18 @ dBm LTE HD-FDD B19 @ dBm LTE HD-FDD B20 @ dBm LTE HD-FDD B25 @ dBm LTE HD-FDD B28 @ dBm LTE HD-FDD B66 @ dBm BG950A-GL&BG951A-GL_Hardware_Design 69 / 84...

  • Page 71: Esd

    LPWA Module Series Table 44: BG950A-GL GNSS Current Consumption BG950A-GL Description Conditions Typ. Unit Cold start @ Passive antenna Searching Hot start @ Passive antenna (AT+CFUN=0) Lost state @ Passive antenna Instrument environment @ Passive antenna Tracking (AT+CFUN=0) Open sky @ Real network, Passive antenna...

  • Page 72: Operating And Storage Temperatures

    Radio spectrum and radio network are not influenced, while one or more specifications, such as P , may exceed the specified tolerances of 3GPP. When the temperature returns to the operating temperature range, the module meets 3GPP specifications again. BG950A-GL&BG951A-GL_Hardware_Design 71 / 84...

  • Page 73: Mechanical Information

    This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are ±0.2 mm unless otherwise specified. 8.1. Mechanical Dimensions 19.9±0.2 2.2±0.2 Pin1 Figure 34: Module Top and Side Dimensions (Unit: mm) BG950A-GL&BG951A-GL_Hardware_Design 72 / 84...
  • Page 74 1.70 0.70 1.00 1.70 0.50 0.25 0.55 0.25 1.10 40x1.0 62x0.7 62x1.10 40x1.0 Figure 35: Module Bottom Dimensions (Bottom View, Unit: mm) NOTE The package warpage level of the module conforms to the JEITA ED-7306 standard. BG950A-GL&BG951A-GL_Hardware_Design 73 / 84...

  • Page 75: Recommended Footprint

    For easy maintenance of the module, keep about 3 mm between the module and other components on the motherboard. All reserved pins must be kept open. For stencil design requirements of the module, see document [6]. BG950A-GL&BG951A-GL_Hardware_Design 74 / 84...

  • Page 76: Top And Bottom Views

    LPWA Module Series 8.3. Top and Bottom Views Figure 37: Top & Bottom Views of BG950A-GL & BG951A-GL NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel.

  • Page 77: Storage, Manufacturing & Packaging

    24 hours after the package is removed if the temperature and moisture do not conform to, or are not sure to conform to IPC/JEDEC J-STD-033. And do not remove the packages of tremendous modules if they are not ready for soldering. BG950A-GL&BG951A-GL_Hardware_Design 76 / 84...

  • Page 78: Manufacturing And Soldering

    PCB has been completed. The recommended reflow soldering thermal profile (lead-free reflow soldering) and related parameters are shown below. Figure 38: Recommended Reflow Soldering Thermal Profile BG950A-GL&BG951A-GL_Hardware_Design 77 / 84...

  • Page 79: Packaging Specifications

    Avoid using ultrasonic technology for module cleaning since it can damage crystals inside the module. Due to the complexity of the SMT process, please contact Quectel Technical Supports in advance for any situation that you are not sure about, or any process (e.g. selective soldering, ultrasonic soldering) that is not mentioned in document [6].

  • Page 80: Plastic Reel

    Figure 39: Carrier Tape Dimension Drawing Table 49: Carrier Tape Dimension Table (Unit: mm) 0.35 20.2 3.15 6.65 20.2 1.75 9.3.2. Plastic Reel Figure 40: Plastic Reel Dimension Drawing Table 50: Plastic Reel Dimension Table (Unit: mm) øD1 øD2 44.5 BG950A-GL&BG951A-GL_Hardware_Design 79 / 84...

  • Page 81: Packing Process

    Place the vacuum-packed plastic reel into a pizza box. Put 4 pizza boxes into 1 carton and seal it. One carton can pack 1000 modules. Figure 41: Packaging Process BG950A-GL&BG951A-GL_Hardware_Design 80 / 84...

  • Page 82: Appendix References

    Balanced to Unbalanced Bits Per Second CHAP Challenge Handshake Authentication Protocol CoAP Constrained Application Protocol Clear to Send DFOTA Delta Firmware Upgrade Over the Air Downlink Discontinuous Reception EGSM Extended GSM (Global System for Mobile Communications) BG950A-GL&BG951A-GL_Hardware_Design 81 / 84...
  • Page 83 Home Subscriber Server Input/Output Inter-Integrated Circuit Inom Nominal Current Low-dropout Regulator Light Emitting Diode Land Grid Array Low Pass Filter LPWA Low-Power Wide-Area (Network) Long Term Evolution LwM2M Lightweight M2M Mobile Equipment MLCC Multi-layer Ceramic Chip BG950A-GL&BG951A-GL_Hardware_Design 82 / 84...
  • Page 84 Power Saving Mode Radio Frequency RFIC Radio Frequency Integrated Circuit RHCP Right Hand Circularly Polarized RoHS Restriction of Hazardous Substances Request to Send Surface Acoustic Wave Surface Mount Device Short Message Service Secure Sockets Layer Transmission Control Protocol BG950A-GL&BG951A-GL_Hardware_Design 83 / 84...
  • Page 85 Minimum High-level Input Voltage Maximum Low-level Input Voltage Minimum Low-level Input Voltage Maximum High-level Output Voltage Minimum High-level Output Voltage Maximum Low-level Output Voltage VoLTE Voice over LTE. VSWR Voltage Standing Wave Ratio WWAN Wireless Wide Area Network BG950A-GL&BG951A-GL_Hardware_Design 84 / 84...
  • Page 86 The minimum distance between the user and/or any bystander and the radiating structure of the transmitter is 20cm. Hereby, We, Quectel Wireless Solutions Co., Ltd. declares that the radio equipment type BG951A-GL is in compliance with the Directive 2014/53/EU. The full text of the EU declaration of conformity is available at the following internet address: Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District,...
  • Page 87 Transmitter Module FCC ID: XMR2021BG951AGL” or “Contains FCC ID: XMR2021BG951AGL” must be used. The host OEM user manual must also contain clear instructions on how end users can find and/or access the module and the FCC ID. BG950A-GL&BG951A-GL_Hardware_Design 86 / 84...
  • Page 88 Déclaration sur l'exposition aux rayonnements RF The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the user’s body BG950A-GL&BG951A-GL_Hardware_Design 87 / 84...
  • Page 89 Innovation, Science and Economic Development Canada certification number for the module, preceded by the word “Contains” or similar wording expressing the same meaning, as follows: BG950A-GL&BG951A-GL_Hardware_Design 88 / 84...
  • Page 90 étiquette indiquant le numéro de certification d'Innovation, Sciences et Développement économique Canada pour le module, précédé du mot «Contient» ou d'un libellé semblable exprimant la même signification, comme suit:"Contient IC: 10224A-2021BG951A " ou "où: 10224A-2021BG951A est le numéro de certification du module. BG950A-GL&BG951A-GL_Hardware_Design 89 / 84...
  • Page 91 LPWA Module Series BG950A-GL&BG951A-GL_Hardware_Design 90 / 84...

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