Quectel EG21-G Reference Design
Quectel EG21-G Reference Design

Quectel EG21-G Reference Design

Lte standard module series
Hide thumbs Also See for EG21-G:

Advertisement

EG21-G
Reference Design
LTE Standard Module Series
Rev. EG21-G_Reference_Design_V1.0
Date: 2019-12-05
Status: Released
www.quectel.com

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the EG21-G and is the answer not in the manual?

Questions and answers

Summary of Contents for Quectel EG21-G

  • Page 1 EG21-G Reference Design LTE Standard Module Series Rev. EG21-G_Reference_Design_V1.0 Date: 2019-12-05 Status: Released www.quectel.com...
  • Page 2 QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS’ REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION.
  • Page 3: About The Document

    LTE Standard Module Series EG21-G Reference Design About the Document Revision History Revision Date Author Description Lim PENG/ 2019-12-05 Initial Woody WU EG21-G_Reference_Design 2 / 8...
  • Page 4: Table Of Contents

    LTE Standard Module Series EG21-G Reference Design Contents About the Document ........................... 2 Contents ............................... 3 Figure Index ..............................4 Reference Design ..........................5 Introduction ..........................5 1.1. Power-on/off and Resetting Scenarios ..................6 1.2. 1.2.1. Power-on Scenario ......................6 1.2.2.
  • Page 5 LTE Standard Module Series EG21-G Reference Design Figure Index FIGURE 1: TIMING OF TURNING ON MODULE ....................6 FIGURE 2: TIMING OF TURNING OFF MODULE ..................... 7 FIGURE 3: TIMING OF RESETTING MODULE ....................8 EG21-G_Reference_Design 4 / 8...
  • Page 6: Reference Design

    EG21-G Reference Design Reference Design 1.1. Introduction This document provides the reference design for Quectel EG21-G module. And the reference design includes power-on/off/resetting scenarios, block diagrams of power supply and module design, UART interfaces, (U)SIM interface, audio interfaces, etc. EG21-G_Reference_Design...
  • Page 7: Power-On/Off And Resetting Scenarios

    LTE Standard Module Series EG21-G Reference Design 1.2. Power-on/off and Resetting Scenarios 1.2.1. Power-on Scenario NOTE 1 VBA T ≥500ms =0.8V PWRKEY ≤0.5V Abo ut 100ms VDD_EXT ≥100ms. Afte r this time, the BOOT_CONFIG pins ca n b e set to high level by external circuit.
  • Page 8: Power-Off Scenario

    LTE Standard Module Series EG21-G Reference Design 1.2.2. Power-off Scenario VBAT ≥ ≥29.5s 650ms PWRKEY STATUS (OD) Module Power-down procedure RUNNING Status Figure 2: Timing of Turning off Module NOTES In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally.
  • Page 9: Resetting Scenario

    LTE Standard Module Series EG21-G Reference Design 1.2.3. Resetting Scenario VBAT ≤460ms ≥150ms ≥1.3V RESET_N ≤0.5V Module Running Resetting Restart Status Figure 3: Timing of Resetting Module NOTES Please ensure that there is no large capacitance with the max value exceeding 10nF on PWRKEY and RESET_N pins.
  • Page 10 CODEC_ POWER_EN TLV320AIC3104 DC 1.8V SGM2019-ADJYN5G/TR VDD_EXT DC 3.3V @0.8A SGMII MIC29302WU DC 3.3V @0.8A MOS ON/OFF SD card SD_PWR_EN Quectel Wireless Solutions PROJECT TITLE DRAWN BY Lorry XU EG21-G Reference Design SIZE CHECKED BY Woody WU SHEET DATE 2019/12/5...
  • Page 11 NET_STATUS 3.3V/1.8V 3.8V, 2.0A VBAT VBAT Level Translator UART MAIN UART NOTE Quectel Wireless Solutions NOTE: A transistor translation circuit or a level translator TXS0108EPWR provided by Texas Instruments is recommended. PROJECT TITLE DRAWN BY Lorry XU EG21-G Reference Design...
  • Page 12 CODEC_PCM_OUT 5. C0101 and C0102 should be placed close to the SGMII interface of the module. 6. Do not pull up pin1,pin5, pin40,pin136,pin137and pin138 unless the module starts up sucessfully. R0122 [7,8] CODEC_PCM_SYNC Quectel Wireless Solutions R0124 [7,8] CODEC_PCM_CLK PROJECT...
  • Page 13 Notes: 1. U0201 represents customers's MCU. The power domain of GPIO interfaces on EG21-G modules is 1.8V. If the domain on U0201's GPIO interfaces is the same, then the level translation circuit can be omitted. 2. EG21-G can only work as a USB device and supports Full Speed and High Speed modes. To communicate with USB interface, MCU needs to support USB host or OTG function.
  • Page 14 Power-on Sequence: power on VDD_1V8 first, then VDD_3.3V. MIC29302WU Power-off Sequence: power off VDD_3.3V first, then VDD_1V8. Note 1 VBAT = (R0314/R0318+1)*1.24 = 3.3V Quectel Wireless Solutions Note: PROJECT TITLE DRAWN BY The recommended load current of MIC29302WU is greater than 10mA.
  • Page 15 4. The RTS and DTR transistor circuits are similar to that of RXD interface. 6. For more information about the layout, please refer to Quectel_EG21-G_Hardware_Design. The CTS, RI and DCD transistor circuits are similar to that of TXD interface. Quectel Wireless Solutions PROJECT TITLE DRAWN BY...
  • Page 16 2. ALC5616 power-off sequence: close codec function by software -> MICVDD -> DBVDD/I2C pull-up power/AVDD/DACREF/CPVDD. 3. EG21-G will automatically initialize the codec via I2C interface after it is turned on successfully, so all power supplies for the codec need to be powered on before that.
  • Page 17 3. The RESET pin must be driven at low level for at least 10ns after all power supplies for TLV320AIC3104 are at their specified values. 4. EG21-G will automatically initialize the codec via I2C interface after it is turned on successfully, Quectel Wireless Solutions so all power supplies for the codec need to be powered on before that.
  • Page 18 4. All MIC and SPK signal traces should be routed with total grounding and far away from noise such as clock and DC-DC signals, etc. 5. ALC5616 and TLV320AIC3104 cannot be used simultaneously in audio codec design. Quectel Wireless Solutions PROJECT...
  • Page 19 3. If an active antenna is selected for the GNSS antenna, a VDD power supply circuit is required; if a passive antenna is selected, the power supply circuit does not needs to be mounted. The power supply VDD of GNSS needs to be selected according to the requirements of the active antenna. Quectel Wireless Solutions 4. The impedance of the RF signal traces must be controlled as 50Ω when routing.
  • Page 20 4. The differential impedance of SGMII data signal is 100Ω±10%, and the reference ground of the area should be complete. Quectel Wireless Solutions 5. Make sure the trace spacing between SGMII RX and TX signals is at least 3 times of the trace width, and is the same to the adjacent signal traces.
  • Page 21 3. The connection method between MDI interface differential line and RJ45 line is 1/2, 3/6, 4/5 and 7/8. Quectel Wireless Solutions 4. To minimize crosstalk, the distance between separate adjacent pairs that are on the same layer must be equal to or larger than 40mil.
  • Page 22 7. Route SDIO signals with 50Ω±10% impedance. It is important to route SDIO signals with total grounding, and the total trace length should be less than 23mm. Quectel Wireless Solutions 8. It is recommended to keep the trace length difference between CLK and DATA/CMD less than 1mm.
  • Page 23 Notes: 1. Test points for both USB and debug UART interfaces are reserved for software debugging. Quectel Wireless Solutions 2. Test points for USB interface also can be reserved for firmware upgrade. 3. Junction capacitance of ESD protection devices on USB data lines should be less than 2pF.

Table of Contents