Table 11- 6 Hardware Fault With One-Sided Call Of Ob 121, Checksum Error, Second Occurrence - Siemens SIMATIC S7-400H System Manual

Fault-tolerant systems
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Hardware fault with one-sided call of OB 121, checksum error, second occurrence
A CPU 41x–5H reacts to a second occurrence of a hardware fault with a one-sided call of
OB 121 and to checksum errors as set out in the table below, based on the various operating
modes of the CPU 41x–5H.
Table 11- 6
Hardware fault with one-sided call of OB 121, checksum error, second occurrence
Error
CPU in standalone mode
Hardware fault
OB 121 is executed
with one-sided call
of OB 121
Checksum errors
The CPU enters the
DEFECTIVE state if two errors
occur within two successive test
cycles (configure the length of
the test cycle in HW Config).
If a second checksum error occurs in single/stand-alone mode after twice the test cycle time
has expired, the CPU reacts as it did on the first occurrence of the error. If a second error
(hardware fault with one-sided call of OB 121, checksum error) occurs in redundant mode
when troubleshooting is finished, the CPU reacts as it did on the first occurrence of the error.
Multiple-bit errors
The CPU changes to ERROR-SEARCH mode when a multiple-bit error is detected while the
fault-tolerant system is operating in redundant mode. When troubleshooting is finished, the
CPU can automatically connect and update itself, and resume redundant operation. At the
transition to error-search mode, the address of the errors is reported in the diagnostic buffer.
Single-bit errors
The CPU calls OB 84 after detection and elimination of the error.
Influencing the cyclic self-test
SFC 90 "H_CTRL" allows you to influence the scope and execution of the cyclic self-test. For
example, you can remove various test components from the overall test and re-introduce
them. In addition, you can explicitly call and process specific test components.
For detailed information on SFC 90 "H_CTRL", refer to the
System and Standard Functions
NOTICE
In a fail-safe system, you are not allowed to disable and then re-enable the cyclic self-tests.
For more details, refer to the
S7-400H
System Manual, 03/2012, A5E00267695-11
System and operating states of the S7–400H
CPU in stand-alone mode
OB 121 is executed
The CPU enters the
DEFECTIVE state if two errors
occur within two successive test
cycles (configure the length of
the test cycle in HW Config).
manual.
S7-400F and S7-400FH Automation Systems
11.4 Self-test
CPU in redundant mode
The faulty CPU enters ERROR-
SEARCH mode. The fault-
tolerant system switches to
standalone mode.
The CPU enters the
DEFECTIVE state if a second
error triggered by the first error
event occurs in ERROR-
SEARCH mode.
System Software for S7-300/400,
manual.
139

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