Operating Modes - Quectel BG95 Series Hardware Design

AP_READY* 19
USB_BOOT 75
RESERVED Pins
Pin Name Pin No.
11~14, 51,
56, 57, 63,
RESERVED 76~78,
83~88,
92~99
NOTES
1)
1. The output voltage of PWRKEY is 1.5V because of the diode drop in the Qualcomm chipset, and
PWRKEY should never be pulled down to GND permanently.
2)
2. RESET_N will be supported in the next hardware design version.
3)
3. ADC0 and ADC1 cannot be used simultaneously. BG95 supports using of only one ADC interface at
a time: either ADC0 or ADC1. Currently only ADC0 is enabled, and ADC1 will be enabled in the next
hardware design version.
4)
4. When PSM is enabled, the function of PSM_IND* pin will be activated after the module is rebooted.
When PSM_IND* is in high voltage level, the module is in normal operation state, when it is in low
voltage level, the module is in PSM.
5. Keep all RESERVED pins and unused pins unconnected.
6. "*" means under development.

3.3. Operating Modes

The table below briefly summarizes the various operating modes of BG95.
BG95_Hardware_Design
Application
DI processor sleep
state detection
Force the
module to enter
DI
into emergency
download mode
I/O Description
Reserved
LPWA Module Series
BG95 Hardware Design
V min=-0.3V
IL
V max=0.6V
IL
V min=1.2V
IH
V max=2.0V
IH
V min=-0.3V
IL
V max=0.6V
IL
V min=1.2V
IH
V max=2.0V
IH
DC Characteristics
1.8V power domain.
If unused, keep this
pin open.
1.8V power domain.
If unused, keep this
pin open.
Comment
Keep these pins
open.
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