Schematic And Layout Of The Ata6661/Ata6662 Development Board - Atmel ATA6661-EK Application Note

2.

Schematic and Layout of the ATA6661/ATA6662 Development Board

Figure 2-1. Schematic of the Development Board for the Atmel ATA6661/ATA6662
VBAT
+5V
GND
X1
RXD
TXD
LIN
X2
WAKE
EN
INH
X3
Notes: 1. D2 and R3 are only necessary for a master node.
2. R5 and D3 are only used in 24V applications. They guarantee that the supply voltage VS never exceeds the
maximum rating of VS
information.
Figure 2-2. Board Component Placement; Top Side, Top View
4 ATA6661/ATA6662 [APPLICATION NOTE]
4968D–AUTO–06/15
R5b
D1
R5
LL4148
0
100Ω/1W
D3
R1
C3
BZG04-33
10kΩ
100nF
R2
4.7kΩ
Wake
S1
switch
INH
= 40V. Refer to the corresponding application note of the Atmel
max
+
C1
22μF/50V
RXD
1
EN
Atmel
2
ATA6661/
WAKE
3
ATA6662
TXD
4
R4
33kΩ
ATA6661-EK
ATA6662-EK
Revision 3.1
C4
D2
100nF
LL4148
R3
INH
1kΩ
INH
8
VS
7
LIN
6
C2
GND
5 220pF
®
ATA6661 for further