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[8] Be sure to wear insulated gloves when handling is required during operation. After Use [9] The ROHM Evaluation Board contains the circuits which store the high voltage. Since it stores the charges even after the connected power circuits are cut, please discharge the electricity after using it, and please deal with it after confirming such electric discharge.
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Gate signal protection circuit and so forth. In this application note the evaluation board operational guide for the TO-247-4L package will be explained. Additionally the detail information regarding topology, BOM, PCB layout, and electrical characteristics is described in the other application note. (TO-247-4L Half-bridge Evaluation Board Product Specification: No.62UG018E Rev.001)
TO-247-4L Half-Bridge Evaluation Board User’s Guide 2.LED Indicators In order to understand the operational condition of the board this evaluation board is equipped with several LED indicators. The location of the LEDs is shown in Figure 2, the indication details are described in Table 1 and LED status details for each occurred event are described in Table 2.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide Table 1. LED Indication Indication Status Details ON when HVdc is over 10V. This LED may still ON even if the HVdc is switched off. Do not touch the board if this LED is ON.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide 3.OCP Setting 3.1 OCP Detection Signal Over Current Protection (OCP) circuit detects the voltage drop across the current sense resistor mounted between LS MOSFET Source and PGND, inputs the OCP detection signal to VTSIN input (pin 01) of LS MOSFET driver IC (U102), generates the FLT signal at the input signal side, and makes all the CLK signals invalid including at the HS side.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide OCP circuit configuration consists of transistors for start-up (Q301, Q305), transistor for Latch (Q303), transistor for Gate OFF (Q304), and transistor for LED indication (Q306). Furthermore, the resistors R362/R363 and R364/R365 to select the OCP circuit GND are available.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide 3.2 Setting at Zero Bias OCP setting during zero bias is not possible. Thus, the OCP setting current I is estimated as below: = ((R361//R350)+R349)/R349*V /0.0047 = 171A BE_Q301 3.3 Setting at Negative Bias During negative bias, OCP point can be adjusted by adjusting the value of adjustable resistor RV301.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide The OCP start-up sequence example at negative bias is shown in Figure 5. OCP setting: 53A (Voltage between TP 303-TP302: 0.4V) OCP設定:53A(TP303-TP302間電圧:0.4V) ソフト Vgs_LS Soft-turn-OFF (TP151) ターンオフ Q301 Collector Q301コレクタ 2.31us 19.1us 7.37us (TP203) 0.58V...
TO-247-4L Half-Bridge Evaluation Board User’s Guide 4.Connector Pin Assignments Connectors’ pin assignment is shown in Figure 6. Each signal and power supply pin description are described in Table 6 and Table 7. Figure 6. Connector Pin Assignment Table 6. Power Supply Pin Description...
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TO-247-4L Half-Bridge Evaluation Board User’s Guide Connector Symbol Details CN201 ENABLE Driver ICs U2 and U102 shared Enable pin (individual control is not required) Active (Driver IC operates) when this signal is Low. It is being pulled up with 2.2kΩ resistor at +5V when OPEN.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide 5.CLK Select Function (JP201 Setting) It is important to prevent simultaneous activation of the HS and LS Gates of the MOSFETs when using a half-bridge configuration. For this evaluation board, selection between Single-CLK Mode that allows driving with a single external signal while preventing the HS and LS simultaneous ON condition, or Dual/DP-CLK Mode that allows ON/OFF driving individually is possible.
6.Gate Drive Voltage Setting Gate drive voltage is supplied by the isolated type Flyback power supply mounted on the board. ROHM’s optocoupler-less control IC (BD7F200EFJ) is used for this Flyback power supply. In addition, transformers to output positive/negative drive voltage for each LS and HS are included.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide 6.1 Positive Bias (VCC2) Adjustment Isolated Flyback power supply transformers (TX1, TX101) are used to generate both positive and negative voltages. The MOSFET drive voltage (positive bias) VCC2 is generated through a LDO Regulator from the transformer’s positive output. The LDO Output voltage is adjustable by adjusting the RV51 and RV151 resistor values.
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Bias voltage during MOSFET OFF (negative bias VEE2) is stabilized at -2V from the negative voltage of TX1 and TX101 transformers by using ZD51 and ZD151 Zener diodes (ROHM: TFZVTR2.0B). VEE2 is supplied through JP51 and JP151 negative bias setting pins.
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The drive circuit mounting condition is shown in Figure 10, and the circuit diagram is shown in Figure 11. The MOSFET is driven by ROHM’s MOSFET driver IC (BM6101FV-C) output signal through the Gate resistors. It is better to shorten the wiring of the driver circuit pattern as it’s inductance affects the surge voltage characteristics of the Gate-Source signal.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide Furthermore, switching speed adjustment can also be done by using either D51 (D151) or D52 (D152). For example, to set the turn ON slower, use D52 (D152) for diodes, and R73 (R173), R74 (R174), R75 (R175) for resistors. Here, the total gate Resistances are R73 (R173) + R74 (R174) // R75 (R175) for the turn ON, and R74 (R174) // R75 (R175) for the turn OFF.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide A specific example of the adjustment is shown in Table 10. However, there are also adjustments other than the example shown in the Table 10. Table 10. Gate Drive Speed Adjustment Gate Drive Circuit Resistor and Diode (Mount/No Mount)
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TO-247-4L Half-Bridge Evaluation Board User’s Guide 8.Dead Time Adjustment Although HS and LS ON/OFF by IN_CLK signal is possible when 「Single-CLK」 Mode is selected from CLK Select function, it is important to prevent simultaneous turn ON of HS and LS. Therefore, a dead time in which both the HS and LS are OFF needs to be included.
TO-247-4L Half-Bridge Evaluation Board User’s Guide 9.Device Current Measurement There are two through-holes (no plating) for each HS and LS on this evaluation board to allow the current flowing to each device to be easily measured using a Rogowski current probe. It is possible to measure the current at the Drain pin for the HS and at the Power Source pin for the LS.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide Rogowski current probes have various loop diameters, the suitable diameter for this evaluation board is shown in Figure 1, 25mm~30mm for the circle diameter, and less than 3mm for the wire diameter. The dimension of the through-holes is shown in Figure 17.
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DUT with evaluation environment under the same conditions. Shared drive circuit (HS) is shown in Figure 18. Q51 is for TO-247-4L and Q52 is for TO-247N. Each pin is connected, but the Q52 Gate circuit return line (return loop to GND2) is separated by R77 resistor (R177 for LS) to avoid the merging of Power Source pin and return line when 4L DUT is mounted.
TO-247-4L Half-Bridge Evaluation Board User’s Guide 11.Heatsink Installation When performing power conversion of several kW such as efficiency measurement based on a power supply topology, the device power consumption itself may reach several W, which will require a heatsink. The layout allows the using of a single heatsink for the cooling purpose even for the commutation devices.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide 12.Evaluation Board Connection Example 12.1 Double-pulse Test for HS MOSFET The connection of the double-pulse test for HS MOSFET is shown in Figure 24. Dual / DP Jumper setting Single HVdc PRIMERY SECONDERY +12V...
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TO-247-4L Half-Bridge Evaluation Board User’s Guide Usually, double-pulse signal is a single-shot, please insure adequate inductor current IDP reset time between pulses if a periodic pulse is applied. As the reset voltage is equal to freewheeling diode forward voltage VF, the reset time can be calculated using the...
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TO-247-4L Half-Bridge Evaluation Board User’s Guide 12.3 Boost Topology Power Supply Circuit The connection of the boost operation by switching the LS MOSFET is shown in Figure 26. Dual / DP Jumper setting HVdc Single PRIMERY SECONDERY +12V Power Gate Power...
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TO-247-4L Half-Bridge Evaluation Board User’s Guide 12.4 2Level Inverter Circuit Dual / DP 2 level inverter circuit based on half bridge configuration is shown in figure 27. Jumper setting Single HVdc PRIMERY SECONDERY +12V Gate Power PGND Power Supply SGND...
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TO-247-4L Half-Bridge Evaluation Board User’s Guide 12.5 Synchronous Buck Topology Power Supply Circuit Dual / DP The connection of the buck operation using the HS MOSFET is shown in Figure 28. Jumper setting Single HVdc PRIMERY SECONDERY +12V Power Gate Power...
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TO-247-4L Half-Bridge Evaluation Board User’s Guide At the CCM Mode in which the inductor current is continuous, the output voltage is approximately defined as below: Vout=Duty*Vin On the other hand, at the DCM Mode, output voltage becomes equal to the input voltage because it is an open loop control, and the pulse is not thinning-out, the output voltage is equal to the input voltage.
TO-247-4L Half-Bridge Evaluation Board User’s Guide 13.Snubber Circuit This evaluation board is equipped with non-discharge type RCD Snubber circuit layout for MOSFET turn OFF surge suppression, the circuit is shown in Figure 29. HVdc C5750C0G3A333J280KC 33nF 1000V 5750 SCT3030AW SCT3040KR...
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TO-247-4L Half-Bridge Evaluation Board User’s Guide Here, the L is the wiring inductance of the main circuit to the bulk (DC link) capacitor, I is the drain current during TRACE MAIN MOSFET turn OFF, and f is the switching frequency of the MOSFET.
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MOSFET. Among ROHM SiC MOSFETs, the third generation SCT3xxxx Series has a narrow Gate-Source voltage rating thus, it is recommended to have these clamp circuits. The Vgs surge voltage can be more effectively suppressed by implementing several of them on the board, but the priority of the layout to be close to the MOSFET is as follows: (III)Active Clamp MOSFET ...
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TO-247-4L Half-Bridge Evaluation Board User’s Guide ■ Waveform example when clamp-SBD is used Figure 33 shows the Vgs surge suppression effect at double pulse test when clamp SBD is used. SCT3040KR MOSFETs are connected in a half-bridge configuration and switching is done on the high side MOSFET. The external Gate resistor is 10Ω. From top, the first waveform is the high side MOSFET Vgs, the second waveform is the commutation side (low side) Vgs, the third waveform is the high side Vds, and the last waveform is the high side Id.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide ■Waveform comparison by using different Cgs capacitances(Without protection circuit) Figure 34 shows the measurement result and the effect of using Cgs on the self-turn on and surge voltage. From the waveforms, we can see that the self-turn on can be prevented by adding the Cgs. However, we also understand that the Cgs does not give a significant effect on the negative surge at turn off.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide ■Waveform comparison by using different Cgs capacitances(With protection circuits) Finally, the measured waveforms when all the Vgs protection circuits are applied are shown in Figure 35. All the abnormalities during turn on and turn off disappeared, therefore, Cgs is not needed.
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TO-247-4L Half-Bridge Evaluation Board User’s Guide 15.Precautions when measuring the Gate-Source signal Drain current di/dt of the MOSFETs with driver source pin is in several A/ns level. Thus, the generation of radiation noise is quite big. Therefore, pay attention to the connection of the voltage probes when measuring comparatively low voltage signals. Figure 36 shows the influence of the voltage probe connection on the measured waveforms.
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Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM or any other parties. ROHM shall have no responsibility whatsoever for any dispute arising out of the use of such technical information.
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