Quectel EG12 Series Hardware Design page 27

Lte-a module series
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Debug UART Interface
Pin Name
Pin No.
DBG_RXD
136
DBG_TXD
137
BT UART Interface (Can be multiplexed into SPI interface*)
Pin Name
Pin No.
BT_EN
3
BT_TXD
163
BT_CTS
164
BT_RXD
165
EG12_Hardware_Design
I/O
Description
DI
Receive data
DO
Transmit data
I/O
Description
BT function enable
DO
control
DO
Transmit data
DO
Clear to send
DI
Receive data
LTE-A Module Series
EG12 Hardware Design
will wake up the
module.
If unused, keep it
open.
DC
Comment
Characteristics
V
min=-0.3V
IL
1.8V power domain.
V
max=0.6V
IL
If unused, keep it
V
min=1.2V
IH
open.
V
max=2.0V
IH
1.8V power domain.
V
max=0.45V
OL
If unused, keep it
V
min=1.35V
OH
open.
DC
Comment
Characteristics
1.8V power domain.
V
max=0.45V
OL
If unused, keep it
V
min=1.35V
OH
open.
1.8V power domain.
If unused, keep it
open.
V
max=0.45V
OL
BT UART interface
V
min=1.35V
OH
pin by default.
Can be multiplexed
into SPI_MOSI.
1.8V power domain.
If unused, keep it
open.
V
max=0.45V
OL
BT UART interface
V
min=1.35V
OH
pin by default.
Can be multiplexed
into SPI_CLK.
1.8V power domain.
If unused, keep it
V
min=-0.3V
IL
open.
V
max=0.6V
IL
BT UART interface
V
min=1.2V
IH
pin by default.
V
max=2.0V
IH
Can be multiplexed
into SPI_MISO.
26 / 97

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