Atari San Francisco Rush 2049 Safety, Specifications, Inspection & Installation page 87

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DESIGNATION 1
I
CONNECTOR P5
(NOTE 1)
CONNECTOR P5
CONNECTOR P5
CONNECTOR P5
BETWEEN U22 &
J6
NOTES:
1.
2.
3.
CPU BOARD ASSEMBLY
JUMPER POSITION CHART
LOCATION
FUNCTION
CPU Boot ROM
NEAR U28 &
CPU Boot ROM
NEAR U28 &
NEAR U28 &
CPU Boot ROM 1 2Mbit ROM I PINS 1 & 2 I
Expansion Boot j 4Mbit ROM j PINS 1 & 2 j
NEAR U28 &
Boot Program
U27
Location
Set both jumpers Jl and J3 to EPROM or Flash ROM mode to use such devices.
These jumpers operate independently of one another.
This jumper is independent of the CPU boot ROM size selected.
MEANING
EPROM
Flash ROM
Flash ROM
8Mbit Flash
Size
1 Mbit ROM
R O M
Size
8Mbit ROM
Boot from
CPU ROM
Boot from
6-5
POSITION 1 DEFAULT
PINS 1 & 2 j
l
PINS 2 & 3
PINS 1 & 2
PINS 2 & 3
PINS 2 & 3
l
PINS 1 & 2
PINS 2 & 3

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