Programming Model; 1.3.1 Processor Mode And Privilege Levels For Software Execution; 1.3.2 Stacks; Summary Of Processor Mode, Privilege Level, And Stack Use - Texas Instruments SimpleLink MSP432P4 Series Technical Reference Manual

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1.3

Programming Model

This section describes the Cortex-M4F programming model. In addition to the individual core register
descriptions, information about the processor modes and privilege levels for software execution and
stacks is included.

1.3.1 Processor Mode and Privilege Levels for Software Execution

The Cortex-M4F has two modes of operation:
• Thread mode: Used to execute application software. The processor enters Thread mode when it
comes out of reset.
• Handler mode: Used to handle exceptions. When the processor has finished exception processing, it
returns to Thread mode.
In addition, the Cortex-M4F has two privilege levels:
• Unprivileged: In this mode, software has the following restrictions:
– Limited access to the MSR and MRS instructions and no use of the CPS instruction
– No access to the system timer, NVIC, or system control block
– Possibly restricted access to memory or peripherals
• Privileged: In this mode, software can use all the instructions and has access to all resources.
In Thread mode, the CONTROL register controls whether software execution is privileged or unprivileged.
In Handler mode, software execution is always privileged.
Only privileged software can write to the CONTROL register to change the privilege level for software
execution in Thread mode. Unprivileged software can use the SVC instruction to make a supervisor call to
transfer control to privileged software.

1.3.2 Stacks

The processor uses a full descending stack, meaning that the stack pointer indicates the last stacked item
on the memory. When the processor pushes a new item onto the stack, it decrements the stack pointer
and then writes the item to the new memory location. The processor implements two stacks: the main
stack and the process stack, with a pointer for each held in independent registers (see the SP register in
Section 1.3.4.2).
In Thread mode, the CONTROL register controls whether the processor uses the main stack or the
process stack. In Handler mode, the processor always uses the main stack. The options for processor
operations are shown in
Table 1-3. Summary of Processor Mode, Privilege Level, and Stack Use
Processor Mode
Thread
Handler
SLAU356I – March 2015 – Revised June 2019
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Table 1-3.
Use
Applications
Exception handlers
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Privilege Level
Privileged or unprivileged
Always privileged
Programming Model
Stack Used
Main stack or process stack
Main stack
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Cortex-M4F Processor