Infineon GPT12 Timer Concatenation 1 Manual page 7

Timer concatenation of gpt12, aurix tc2xx microcontroller training

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Implementation

The Interrupt Service Routines (ISRs)

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The incrementation of the counter values is different for both timers:

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The counter of timer T6 (Timer Mode) is incremented with the frequency of timer T6.

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The counter of timer T5 (Counter Mode) is incremented by each overflow of timer

T6.

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The overflow of each timer triggers an interrupt.

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Each timer has associated its own Interrupt Service Routine.

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The ISR of timer T6 is triggered after the overflow of the 16-bit timer value of timer T6.

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Due to the timer concatenation, the ISR of timer T5 is triggered with the overflow of the

32-bit timer value. This ISR toggles an LED.

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The 32-bit timer value is calculated in the ISR of T6 and is represented by

timerValueHIGH (T5) and timerValueLOW (T6).

2019-10-17

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