Trigger Amplifiers; Ζ-Axis Sign Al; Vertica L Ampli F I Er; Delay L Ine - Tektronix 5440 Instruction Manual

Circuit Descri
p
tion-5440
T
h
e gai
n
of t
h
e vertical am
p
lifier p ortion of
U
620 is set
Ζ -Axis Signal
by resistors R 620 (left
p
lug-in amplifier) a
n
d R 626 (center
The gate signal from t
h
e Α and Β swee p s are added on
p lug-in am
p
lifier) . T
h
e vertical out
p
utsignal at p ins 12 an d
the i
n
terface circuit board . T
h
e combine d Α and Β gate
13 of
U
620 goes to α groun d e d -base stage consisting of
signal is also summed wit
h
t
h
e trace intensification an d
0640 a
n
d 0660 . 0640 and 0660 c
h
ange t
h
e d o level of t
h
e
c
h
oppe d blan
k ing signals before being supplied, via
vertical sig
n
al so t
h
at it is com
p
atible wit
h
t
h
e vertical
contact 4 of Ρ 755, to t
h e dis p lay mo d ule as t
h
e Ζ -Axis
am
p
lifier i
n
t
h
e Dis
p
lay module . 0630 an d 0650 act as
sig
n
al . Dio d e C
R
761 limits t
h
e combine d signals οη t
h
eZ-
bot
h
α current source for t
h
e grou
n
ded base stage an d an
Axis sig
n
al line . C766 an d R 766, w
h
ic
h
are in p arallel wit
h
i
n
sertio
n p
oi
n
t for t
h
e vertical rea d out an d trace separa-
the i
np
ut to t
h
e Ζ -Axis am
p
lifier, serve to increase t
h
e rise
tio
n
information .
time of t
h
e Ζ -Axis sig
n
al .
Trace se
p
aratio
n
information fro m contact Β 16 of
J
630
is su p
p
lie d to t
h
e emitter of 0650 via 0674 . Trace
separation i
n
formatio
n
is only available w
h
en α dual time
base p lug-in is use d .
T
h
e vertical C
H
switc
h
O
FF
signal is supplie d to Q670
w
h
ere it causes 0674 to be reverse biased duri
n
g rea d out
time, t
h
us bloc
k
ing t
h
e trace separation information . T
h
e
signal also goes to
p
i
n
6 of U 620 w
h
ere it is used to prevent
any vertical sig
n
al out
p
ut from
U
620 duri
n
g rea
d
out time .
During t
h
e time of t
h
e vertical C
H
switc
h
O
FF
sig
n
al,
vertical rea d out signal information is su pp lied to t
h
e
emitter of 0630 .
H
orizontal Am p lifier
T
h
e
h
orizo
n
tal am
p
lifier consists of an emitter follower
stage (0740, 0744) an d α gain stage (0748, 0752) . T
h
e
gai
n
setti
n
g resistor is R 750 . T
h
ermistor R T754 and
resistor
R
756 p rovi d e α tem
p
erature compensation
networ
k
for t
h
e am p lifier .
Trigger Amplifiers
T
h
e vertical amplifier circuit
p rovides t
h
e final
am
p
lificatio
n
for t
h
e vertical signal before it is a pp lied to
t
h
e vertical deflection p lates of t
h
e crt . T
h
e vertical
am p lifier circuitry inclu d es t
h e delay li
n
e and
p
art of t
h
e
beam finder circuit, w
h
ic
h
reduces t
h
e final drive to
compress an over-scanned display to wit
h
in t
h
e viewing
area of t
h
e crt .
Delay
L
ine
VER
TICA
L AMPL
I
F
I
ER
Delay line D
L 100 p rovides a p proximately 140 ns of
delay for t
h
e vertical signal . . T
h is allows t
h
e time-base
circuits time to initate α sweep before t
h e vertical signal
reac
h es t
h
e crt d eflection p lates . T
h
is d elay of t
h
e vertical
signal allows t
h
e leading e
d
ge of t
h
e signal originati
n
g t
h
e
trigger p ulse to be dis p layed w
h
en using internal trigger-
ing .
T
h
e d elay li
n e
h
as α
c
h
aracteristic in p ut im p eda
n
ce of
about 50 o
h
ms, or about 100 o
h
ms from si d e-to-side .
Am p lifier
L
eft
V
ertical Plug-in . Α nominal 250 mv/division,
si
n
gle-ended, i
np
ut sig
n
al is ap
p
lied to t
h
e in
p
ut stage ο f α
The vertical am p lifier consists of α
h
ig
h
ban dp ass
two stage am
p
lifier from co n
tact Α 4 of
J
610 . T
h
e first
three-stage
p
ara
ph
ase am p lifier
h
aving an in p ut se
n
sitivi-
stage, α para p
h
ase amplifier, consisti
n
g of 0700-Q708
t Υ of ap
p
roximately 25 m
V / d
ivision an d α voltage gain of
am
p
lifies t
h
e signal by 1/4 . T
h
esecond gain stage consists
about 160 . T
h
e am p lifier is d ifferentially
d
riven at t
h e
of 0710 a
nd
0715, R
713 sets t
h
e stage gain . T
h
e out p ut
bases of 0100 and 0125 by t
h
e in p ut sig
n
al from t
h
e
d
elay
sig
n
al am
p
litu d e of t
h
e trigger am
p
lifier depen d s upon t
h
e
line .
R
100 a
n
d
R
125 terminate t
h e delay line .
i
np
ut impedance of t
h
e time-base trigger circuit at con-
tacts Α 3
an
d Β 4 of
J
630 . Time-base
p
lug-ins d esigned for
t
h
e 5100-series oscilloscope
h
ave α
h
ig
h
input im
p
e d a
n
ce, T
h
e first am
p
lifier stage consists of 0100, 0106, 0125,
w
h
ic
h
results i
n
α sig
n
al am
p
litu d e of 240 m
V
/ d ivisio n
. a
n
d Q130 . T
h e gai
n
of t
h
is stage is determine d byt
h
e ratio
Time-base plug-ins
d
esigned for t
h
e 5400-series os- of t
h
e fee d bac
k
resistors
R
104-
R
103 or R 128-
R
129 and t
h e
cilloscope
h
ave α low im p eda
n
ce, w
h
ic
h
results in α signal emitter resistor
R
111 . T
h
e networ
k
s
p
arallel to t
h
e emitter
amplitu d e of 50 m
V
/d ivisio
n
. resistor com
p
ensates for t
h
e sig
n
al losses in t
h
e
d
elay
1line .
R
135 acts as α
d
o centeri
n
g control, w
h
ic
h
compen-
sates for resistive tolerance errors and crt electrical center
R
ig
h
t
V
ertical Plug-in . T
h
e rig
h
t vertical p lug-in trigger
error i
n
t
h
e vertical am p lifier, and allows t
h
e mainframe
Amplifier o
p
erates t
h
e same as described above . in
p
ut to be sta
n
d ardized .