Table 4-4 Topcliff Gpio Configuration - Emerson NITX-300-ET-DVI Installation And Use Manual

Table 4-3 TNC GPIO Definition (continued)
5 Core-well GPIOs (turned off during sleep mode)
GPIO[4]
GPIO[3:2]
GPIO[1]
GPIO[0]
9 Sus well GPIOs accessible during S3 sleep state (GPIO SUS[0:8])
GPIO_SUS[8]
GPIO_SUS[6:5]
GPIO_SUS[2]
GPIO_SUS[1]
GPIO_SUS[0]

Table 4-4 Topcliff GPIO Configuration

Name
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
NITX-300-ET-DVI Installation and Use (6806800N97A)
LPC[0] clock buffer strength control. Also muxed with WDT_TIMEOUT.
Defines CMC base address
Reserved
Defines boot flash from SPI or LPC
Defines number of ranks enabled
Defines memory device densities
Muxed with LVDS BKLTCTL
Muxed with LVDS BKLTEN
Defines memory device width (x16 or x8). Also muxed with LVDS VDDEN.
Function
USB MUX control.
Low: USB port5 is routing to Mini PCI-E slot
High : USB port5 is routing to eUSB slot
NC
NC
NC
NC
Client USB power detect.
Low: No Client USB power existence
High: Client USB power existence
NC
NC
DRAM vendor.
Low: SAMSUNG
High: MICRON
Functional Description
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