Seco Qseven CQ7-A42 User Manual page 32

Optional Backlight and LCD PSU connector - CN17
Pin Signal
1 SW_VDD_FUSE
3 +5V_S (Fuse protected)
5 LVDS_VDD_EN
7 N.C.
9 GND
SW_VDD_FUSE and SW_BACK_FUSE mean Switched_VDD and Switched_Backlight, i.e., these are the voltages that can be supplied to LCD and backlight,
respectively, and are enabled/disabled via the signals LVDS-PPEN and LVDS_BLEN, respectively. The suffix _FUSE means that these voltages are protected by a
polyswitch resettable fuse.
JP4 position SW_VDD_FUSE Voltage
1-2 +5V_A
2-3 +3.3V_A
JP3 position SW_BACK_FUSE Voltage
1-2 +12V_A
2-3 +5V_A
CQ7-A42
CQ7-A42 - Rev. First Edition: 1.0 - Last Edition: 2.0 - Author: S.B. - Reviewed by G.G. Copyright © 2016 SECO S.r.l.
Pin Signal
2 SW_BACK_FUSE
4 +12V_S (Fuse protected)
6 LVDS_BACKLIGHT_EN
8 LVDS_BLT_CTRL
10 GND
LCD software-driven voltage, i.e. signal SW_VDD_FUSE, can also be regulated to be connected
to +5V_A or +3.3V_A, using jumper JP4, which is a standard pin header, P2.54mm, 1x3 pin.
Similarly, backlight software-driven voltage, signal SW_BACK_FUSE, can be regulated to be connected to
+12V_A or +5V_A, using jumper JP3, which is another standard pin header, P2.54mm, 1x3 pin.
N.B. Jumpers JP3 and JP4 are always present, independently by the configuration of the board purchased
(with LVDS or with eDP connectors).
When the board is configured with the optional LVDS connector CN16,
then there will be a dedicated backlight / LCD PSU connector, too.
The connector, CN17, is an IDC connector, dual row, 10 pin, p2.54 mm
connector, type MOLEX p/n 70246-1004 or equivalent.
Mating connector: MOLEX p/n 22-25-2102 with 70058 series female crimp terminals.
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