Programmable Switch Matrices; Single-Length Lines - Xilinx XC4000E Series Manual

XC4000E and XC4000X Series Field Programmable Gate Arrays
Quad
Figure 26: High-Level Routing Diagram of XC4000 Series CLB (shaded arrows indicate XC4000X only)
Table 15: Routing per CLB in XC4000 Series Devices
XC4000E
Vertical Horizontal Vertical Horizontal
Singles 8
Doubles 4
Quads 0
Longlines 6
Direct 0
Connects
Globals 4
Carry Logic 2
Total 24

Programmable Switch Matrices

The horizontal and vertical single- and double-length lines
intersect at a box called a programmable switch matrix
(PSM). Each switch matrix consists of programmable pass
transistors used to establish connections between the lines
(see Figure 27).
For example, a single-length signal entering on the right
side of the switch matrix can be routed to a single-length
line on the top, left, or bottom sides, or any combination
thereof, if multiple branches are required. Similarly, a dou-
ble-length signal can be routed to a double-length line on
any or all of the other three edges of the programmable
switch matrix.
4-30
Long Global Long Double Single Global
Clock
XC4000X
8 8
4 4
0 12 12
6 10
0 2
0 8
0 1
18 45 32
Carry
Clock Chain
8
Double
4
Singles
6
2
Double
0
0
Figure 27: Programmable Switch Matrix (PSM)

Single-Length Lines

Single-length lines provide the greatest interconnect flexi-
bility and offer fast routing between adjacent blocks. There
are eight vertical and eight horizontal single-length lines
associated with each CLB. These lines connect the switch-
ing matrices that are located in every row and a column of
CLBs.
Single-length lines are connected by way of the program-
mable switch matrices, as shown in
connectivity is shown in
Single-length lines incur a delay whenever they go through
a switching matrix. Therefore, they are not suitable for rout-
ing signals for long distances. They are normally used to
conduct signals within a localized area and to provide the
branching for nets with fanout greater than one.
Quad
Single
Double
Long
Direct
CLB
Connect
Long
Direct
Connect
x5994
Six Pass Transistors
Figure
Figure 28.
March 30, 1998 (Version 1.5)
Per Switch Matrix
Interconnect Point
X6600
29. Routing