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The SBC-410 features a 2nd level memory cache that supports
128, 256, or 512 KB of cache memory. Higher cache memory
can improve your system's performance.
The cache uses SRAM chips in three sizes: 32 KB, 64 KB and
128 KB. The on-board cache memory banks consists of four
SRAM chip sockets, each of which accepts one "Tag" chip. All
SRAM chips must have a speed of 20 ns or faster. The table below
shows the possible cache configurations:
Cache size
128 KB
256 KB
512 KB
When the cache size changes, you must make sure that JP11 is set
to match the new cache memory size. The following chart shows
the proper jumper setting for each cache configuration:
2
1
*default
18 SBC-410 User's Manual
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
Tag RAM
one 32 K x 8
one 32 K x 8
one 32 K x 8
128 KB*
256 KB
4
2
3
1
Data RAM
four 32 KB x 8 SRAMs
four 64 KB x 8 SRAMs
four 128 K x 8 SRAMs
512 KB
4
2
4
3
1
3
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