Watchdog Timer Initial Program - Intel EMB-H61A Manual

I n d u s t r i al M o t he r b o ar d
A.1 Watchdog Timer Initial Program
Table 1 : SuperIO relative register table
Default Value
Index 0x2E
(Note1)
Data 0x2F
(Note2)
Timer
0x07
Counter
Counting
0x07
Unit
Watchdog
0x07
Enable
Timeout
0x07
Status
Output
0x07
Mode
WDTRST
0x07
output
Appendix A Programming the Watchdog Timer A-2
SIO MB PnP Mode Index Register
0x2E or 0x4E
SIO MB PnP Mode Data Register
0x2F or 0x4F
Table 2 : Watchdog relative register table
LDN Register
0xF6
(Note3) (Note4)
0xF5
(Note5) (Note6)
0xF5
(Note9) (Note10)
0xF5
(Note13) (Note14)
0xF5
(Note16) (Note17)
0xFA
(Note20) (Note21)
E M B - H6 1 A
Note
BitNum
(Note24)
3 0
(Note7)
5 1
(Note11)
6
(Note15)
4 1
(Note18)
0 1
(Note22)
Value Note
Time of watchdog
timer
(0~255)
This register is byte
access
Select time unit.
0: second
(Note8)
1: minute
0: Disable
(Note12)
1: Enable
1: Clear
1
status
Select
output mode
(Note19)
0: level
1: pulse
Enable/Disable
time out output via
WDTRST#
(Note23)
0: Disable
1: Enable
timeout
WDTRST#