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9.9.3
OSD/CC Control
On pins 35 to 38, the RGB and fast blanking from the OTC
(OSD and CC) are inserted. The sync signal V
from the 'FRAMEDRIVE-" signal.
9.9.4
Peak White Limiting
On pin 43 there is a Peak White Limiting signal line (PWL.) If
the beam current increases, the 'EHT-info' voltage will
decrease. Average limiting via R3343/C2333 controls PWL.
9.9.5
Cut-off Control
The following occurs when you switch the TV to Standby:
1. The vertical scan is completed.
2. The vertical flyback is completed (the horizontal output is
gated with the flyback pulse, so that the horizontal output
transistor cannot be switched 'on' during the flyback pulse.)
3. The 'slow stop' of the horizontal output is started, by
gradually reducing the 'on' time at the horizontal output
from nominal to zero (this will take 50 ms.)
4. At the same time, the fixed beam current is forced via the
black-current-loop for 25 ms. This is done by setting the
RGB outputs to a maximum voltage of 5.6V.
A 'one-point' cut-off control is used:
A current of 8 µA (for cut-off) is fed to pin 44 of the HOP. This
is done with a measurement pulse during the frame flyback.
During the first frame, three pulses are generated to adjust the
cut-off voltage at a current of 8 µA. With this measurement, the
black level at the RGB-outputs is adjusted. Therefore, at start-
up there is no monitor pulse anymore. At start-up, the HOP
measures the pulses, which come back via pin 44. The RGB-
outputs have to be between 1.5 V and 3.5 V. If one of the
outputs is higher than 3.5 V or one of them lower than 1.5 V,
the RGB-outputs will be blanked.
9.9.6
Geometry control
All geometry control is performed via I
in the NVM (IC7011) of the SSB.
9.9.7
Deflection Control
Line Drive
The Line drive is derived from an internal VCO. As a reference,
an external resonator is used (1301.) The internal VCO is
locked with the H
D100
The 'PHI-2' part in the HOP receives the HFB_X-RAY_PROT
(pin 13) to correct the phase of the Line drive. The EHT-info is
supplied to pin 14 (DYN-PHASE-CORR) to compensate
picture breathing depending on the beam current.
Note: This is not used in this chassis, therefore EHT-
compensation in the SAM menu is set to zero.
Frame Drive
At pins 1 and 2, the symmetrical frame drive signals are
available. The V
SYNC
CC, is derived from the 'FRAMEDRIVE-' signal.
East/West Drive
At pin 3, the E/W drive signal is available. Pin 4 is a feedback
input for the EHT-info, and is used to prevent pumping of the
picture. The EHT also varies dependent on the beam current.
For example, for wide-screen without load this is 31.5 kV and
with load (1.5 mA) 29.5 kV.
Frame Rotation
For frame rotation, a control voltage from pin 25 of the HOP is
used. Frame rotation is only used in wide-screen sets.
Circuit Descriptions and Abbreviation List
is derived
SYNC
2
C and the data is stored
-pulse, which comes from the PICNIC.
signal, for synchronization of the OSD/
EM5A NTSC
9.9.8
Guarding protections
Flash detection
When a flash occurs, the EHT-info will become negative very
quickly. Via R3316, D6304, and D6303, TS7303 starts to
conduct. This makes pin 5 of HOP 'high.' The output (pin 8) is
immediately stopped.
If the H-drive stops, then pin 5 will also become 'low' again,
which will reset the flash detection.
A bit (FLS) is set in an output status register, so that the OTC
can detect that there was a flash. This FLS-bit will be reset
when the OTC has read that register.
HFB protection
If the HFB is not present, this is detected via the HOP. The OTC
puts the set into protection and reads a register in the HOP. An
error code is generated.
9.10 3D Comb Filter (Diagram CO)
Conventional Comb filters separate the luminance (black and
white picture information) from the chroma (color picture
information), by comparing horizontal scanning lines within one
video frame The 3D Digital Comb Filter takes this idea two
steps further by acting upon not only consecutive lines within
the frame, but in the frame before and after as well. The added
analysis and correction result in far sharper pictures with less
noise, as well as an enhanced purity of colour. The filter also
compensates for any motion that occurs between fields.
The video inputs and outputs are protected from temporary
overload conditions and are ESD protected for improved
reliability. The module is controlled via I
The red LED on the panel indicates proper sync and color burst
timing. When they are detected, the LED must be 'off.'
The input currents for the 5 V (280 mA) and 9 V (120 mA)
supply are self-limiting due to the use of a PTC (R3103 and
R3104).
The 3D Comb filter is integrated in one IC (type µPD64083.)
The block diagram of the 3D Comb panel is indicated in the
next figure.
+8.0 V
84
Y to HIP
Y Output
Input
Amp & Fil ter
+8.0 V
C to HIP
83
C Output
Input
Amp & Fil ter
CVB S From
CVB S Input
88
HIP Output
Amp & Filter
Video Clamp
and Filters
+8.2 V
8.0 V Fil ter
From Main
Chassis
Supplies
2.5 V Reg
+5.0 V
3.3 V Reg
Figure 9-17 Block diagram 3D comb filter
9.
EN 129
2
C commands.
+2.5 V
+3.3 V
Power On
Reset
Sync
Amp
76
57
50
PLL Filter
52
Analog Supply
Decoupling
NEC
PD64083
48
47
Xtal
Digital Supply
Decoupling
Memory Supply
Decoupling
+8.0 V
+2.5 V
+3.3 V
CL 26532058_016.eps
050602
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