Huawei MC509 Hardware Manual page 25

HUAWEI MC509 CDMA Mini PCIe Module
Hardware Guide
Figure 3-13 PCM_CODEC to MC509 Mini PCIe timing
Figure 3-14 MC509 Mini PCIe to PCM_CODEC timing
Table 3-7 PCM_CODEC timing parameters
Parameter
t(sync)
t(synca)
t(syncd)
t(clk)
t(clkh)
t(clkl)
t(sudin)
t(hdin)
t(pdout)
t(zdout)
Issue 03 (2014-12-26)
PCM_SYNC cycle time
PCM_SYNC asserted time
PCM_SYNC de-asserted time
PCM_CLK cycle time
PCM_CLK high time
PCM_CLK low time
PCM_DIN setup time to
PCM_CLK falling
PCM_DIN hold time after
PCM_CLK falling
Delay from PCM_CLK rising to
PCM_DOUT valid
Delay from PCM_CLK falling
to PCM_DOUT HIGH-Z
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Copyright © Huawei Technologies Co., Ltd.
Description of the Application Interfaces
Min. Typ. Max.
- 125 -
400 500 -
- 124.5 -
400 500 -
200 250 -
200 250 -
50 - -
10 - -
- - 350
- 160 -
Unit
μs
ns
μs
ns
ns
ns
ns
ns
ns
ns
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