Appendix A Circuit Of Typical Interface - Huawei MC509 Hardware Manual

Cdma mini pcie module
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HUAWEI MC509 CDMA Mini PCIe Module
Hardware Guide
9

Appendix A Circuit of Typical Interface

VCC From Host
Wake the host
1
3
Open drain,active low
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
VCC_3V3
39
41
43
PCM_CLK
45
47
PCM_DOUT
PCM_DIN
49
51
PCM_SYNC
Note the signal direction o f PCM_DOUT,PCM_DIN
Don't support Hot Plug.
RUIM_PWR
R3
0
RUIM_RESET
R4
0
RUIM_CLK
R5
0
RUIM_DATA
R6
0
C8
C9
C10
C11
C12
1uF
Issue 03 (2014-12-26)
J1
2
WAKE #
VCC_3V3
4
GND
RESERVED
6
RESERVED
NC
8
NC
RUIM_PWR
10
GND
RUIM_DATA
12
NC
RUIM_CLK
14
NC
RUIM_RESE T
16
GND
NC
W_DISAB LE#
18
RESE RVE D
GND
20
RESE RVE D
W_DISAB LE#
22
GND5
RESIN_N
24
NC
VCC_3V3
26
NC
GND
28
GND
NC
30
GND
NC
32
NC
NC
34
NC
GND
36
GND
USB _DM
38
GND
USB _DP
40
VCC_3V3
GND
LED_WW AN#
42
VCC_3V3
LED_WWAN#
44
GND
NC
46
PCM_CLK
NC
48
PCM_DOUT
NC
50
PCM_DIN
GND
52
PCM_SYNC
VCC_3V3
C1
100nF
J2
10
M1
8
GND
S2
4
CD
1
VCC
5
GND
2
RST
GND
6
VP P
3
CLK
7
I/O
9
S3
11
M2
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
VCC_3V3
RUIM_PWR
RUIM_DATA
RUIM_CLK
RUIM_RESET
Active low(Don' t conn ect a diode to this pin)
RESIN_N
Active low
VCC_3V3
Cap close to the pin22 o f modu le
USB_D-
USB_D+
VCC_3V3
D1
R2
470
VCC_3V3
C2
10pF
GPIO1
R7
0
GPIO1 is from Host
Leave RESIN_N pin op en if dono t use it.
Appendix A Circuit of Typical Interface
USB_D+
to USB 2.0 interface
DNI,Reserve for
DNI
USB eye debug
USB_D-
VCC_3V3
RESIN_N
Q1
3
D
GPIO2
G
1
GPIO2 is from Host
Leave W_DISAB LE# p in op en if dono t use it.
2
S
VCC_3V3
W_DISAB LE#
Q2
3
D
R9
0
G
1
2
S
55

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