IBM 5100 Maintenance Information Manual page 355

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Mnemonic Microinstruction Name Op Code Modifier Microinstruction Type
MVP1 Move plus 1 0 2 Register
MVP2 Move plus 2 0 3 Register
ORB
Or byte 0
6
Logical reg
PUTB Put byte 4
Ml
I/O
ROTR Rotate register
E
SM l
Logical reg
SETI Set immediate B
Logical reg
SHFTR Shift right E C Logical reg
STBI Store byte indirect 2 7
Ml
Fetch and store
STHD Store halfword direct 2 3 Fetch and store
STHI
Store halfword indirect
2 5
Ml
Fetch and store
SUB Subtract 0 9 Arithmetic reg
SUBI Subtract immediate F Arithmetic reg
XOR
Exclusive or 0 7 Logical reg
1
See the description of
Microinstructions
in this section.
2
Direct means that the read/write storage address is in the microinstruction itself and indirect
means that the read/write storage address is in a register.
Descriptions
I/O Microinstructions and Data Tables:
The I/O micro-
instructions are used to communicate with the I/O devices.
They send and receive data, and perform various control
functions.
Up to 16 device addresses are selected directly with a
device address (DA) in the microinstruction. In addition,
the capacity of some device addresses is increased from one
I/O device per device address to eight I/O devices per
device address by using subdevice addressing.
When an I/O operation to a device having a subdevice
address is performed, the subdevice must first be selected.
This is accomplished by resetting all subdevices for the
pertinent device and then selecting the subdevice (for
example, refer to the Control Command Data Table,
device address 1). All subsequent I/O microinstructions
for the pertinent device access the selected subdevice.
Devices with subdevice addressing capabilities have device
addresses 1, B, C, D, and E.
Microinstructions C-3