SICK HIPERFACE DSL Technical Information
SICK HIPERFACE DSL Technical Information

SICK HIPERFACE DSL Technical Information

Implementation

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T E C H N I C A L I N F O R M A T I O N
HIPERFACE DSL
®
Implementation

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Summary of Contents for SICK HIPERFACE DSL

  • Page 1 T E C H N I C A L I N F O R M A T I O N HIPERFACE DSL ® Implementation...
  • Page 2 Internet: http://www.sick.com E-mail: info@sick.com Made in Germany, 2016. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 3: Table Of Contents

    Access to resources.................. Resources list.................... Node......................Identification resources................8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 4 10.4 Recommendations on installation site............ 168 Index....................169 Glossary....................170 Versions....................171 T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 5: List Of Figures

    42. Connection of the hybrid motor cable to the servo controller ......163 43. Pin layout M23......................167 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 6: Scope Of Application Of The Document

    • Standardized interface between the frequency inverter application and the proto‐ col logic T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 7: Features Of Hiperface Dsl

    SIL3 applications (in accordance with IEC 61508). 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 8 Additional configurable SPI for output of the data from external sensors. • Configurable interrupt output T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 9: Protocol Overview

    8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 10 The cycle time of each individual channel varies with the length of the basic protocol package. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 11: Process Data Channel

    Please see chapter 7.3.1 details. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 12: Safe Channel 1

    SYNC to EXTRA packages the sampling time of the safe position value will change between measurements. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 13: Safe Channel

    HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 14 Figure 4: HIPERFACE DSL SensorHub interface ® T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 15: Hardware Installation

    8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 16 DSL+ DSL- Figure 6: Interface circuit with two core cable (integrated in cable) T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 17 PCB design 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 18: Fpga Ip Core

    The following figure show the possible combinations of IP Core and interface block vari‐ ants. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 19 Auxiliary signals dsl_in* Input DSL cable, input data 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 20 Switch on Figure 8: Reset procedure T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 21: Cable Specification

    “Cable and Connector for HIPERFACE DSL Motor and Drive Applications”. ® 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 22: Interfaces

    Output IP Core status (see chapter 6.2) T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 23: Spi Pipe Interface

    The data with the highest value bit (MSB) is given first. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 24: Control Signals

    SYNC signal is a DSL Master digital input. sync T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 25 SYNC edge supplied by the application has been transported with more than 2 clock cycles of distortion. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 26: Test Signals

    Realignment from safe to fast - fast position is forced to the safe position value • The protocol is re-synchronizing following a break in the link T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 27 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 28 DSL system. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 29: Register Map

    8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 30: Online Status D

    1 = interrupt output on "High" level output on "Low" level interrupt T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 31 0 = Parameter Channel not functioning. Bit 4 ANS: Incorrect answer detected. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 32: Dsl Master Function Register

    0000 0000 POS2 Fast position, byte 2 0000 0000 T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 33 DSL Master. SYS_CTRL 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 34 Register 01h: Synchronization control T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 35 Quality monitoring register LINK Bit 7 Bit 0 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 36 1 = Data consistency error on the Safe Channel. 0 = Safe Channel data was correctly transmitted. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 37 1 = The forced protocol reset was triggered. 0 = Normal protocol action 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 38 1 = A "short message" can be sent on the Parameters Channel. 0 = No "short message" can be sent. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 39 SUMMARY inter- signal. rupt 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 40 0 = If a "long message" can be sent on the Parameters Channel, the signal interrupt is not set. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 41 A new bit sampling pattern is only generated after a forced reset of the protocol. Register 09h: Edges Bit sampling pattern 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 42 In this case, a check should be made of whether the cable complies with the cable specification. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 43 Bit 16 Register 0Eh: Encoder ID, byte 1 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 44 The units of the position value are (steps). These registers are write protected. CAUTION The fast position must not be used for safety functions. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 45 Bit 23 Bit 16 Register 16h: Speed, byte 1 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 46 1 = An error, a warning or an event associated with DSL Slave external resources was triggered. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 47 Safe position, byte 0 Safe position, byte 0 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 48 Access to these registers may only take place if the "long message" channel is free (FREL in the register). EVENT_L T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 49 Bit 16 Register 26h: Parameters Channel buffer, byte 6 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 50 PC_OFF_L Read access: 1 = The last "long message" caused an error. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 51 Bit 0 Bit 7-1 Not implemented: Read as "0". 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 52 This bit is stored together with the pipeline data byte in question in the FIFO buffer. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 53 Parameters Channel short message contains the results PC_DATA of "short message" transactions. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 54 RES1:RES0: Resolution of fast position acceleration boundary Bit 5-0 MNT5:MNT0: Mantissa of fast position acceleration boundary T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 55: Function Register For The Dsl Slave

    ST71 ST70 0000 0000 SRSSI SRSSI2:0 ---- -000 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 56 Bit 16 Register 43h: Encoder status, byte 3 T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 57 Not implemented: Read as "0". Bit 2-0 Value of the Slave RSSI 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 58 8 bit hardware version of the DSL encoder at start-up. On first reading, the Ping value of the slave can be used as a connection test on behalf of the slave. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 59: Central Functions

    DSL synchronization OEN = 1 None (SYS_CTRL register) 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 60: System Diagnostics

    The aim should be that, during interference-free operation, the min‐ imum number of bits is set in the sampling pattern. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 61: Fast Position

    ® POS0…4 rotation speed in the registers. VEL0…2 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 62 “1”. This is the easiest approach to use the estimator and recommended for most applications. No further setup is required. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 63 In this case the data to be written to the register would be 0x54. MAXACC 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 64 The position is available after a set delay in relation to the leading edge of the control signal. When SYNC mode is used the following points must be noted: T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 65 ES divider and the sync cycle DSL output signal. dsl_out 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 66: Safe Position, Channel

    The complete transmission is available every eighth protocol frame. Therefore the posi‐ tion values are older than the fast position values received in the same frame. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 67: Parameters Channel

    8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 68 The result, where present, is recorded in the registers. PC_BUFFER0:7 T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 69 The meaning of each characteristic is described in the table below. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 70 "Long message" mode No offset addressing Offset addressing T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 71 "long message" in the motor feedback system to be ended and a corres- ponding error message will be indicated. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 72 In that case, "the long message" will not be repeated. The user needs to per‐ form the same "long message" action once again. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 73 Figure 28: Reset of the Parameters Channel 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 74: Status And Error Messages

    This mechanism is explained below using an example (error in the transmitted fast position, POS bit). Figure 29: Acknowledgment of event bits T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 75 (see chapter 6.3.5). 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 76 RID 100h. For HW reset power have to be taken off for at least 1 sec. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 77 Occurrence during opera‐ tion leads to a permanent error. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 78 Will lead to a VPOS-error. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 79 ENC_ST informa‐ tion can be relied upon! 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 80 Potential causes: hardware failures or external shocks. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 81 ENC_ST informa‐ tion can be relied upon! 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 82 T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 83 Np- bit is cleared in slave after clearing by master (acknowledgement) 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 84 T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 85 No file loaded for action File exists with the same name 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 86: Motor Feedback System Resources

    By progressing recursively through further nodes, it is possible to access all levels of the tree. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 87 Table 44: Parameters for node access. Characteristic Value Description DATA 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 88 RID of the 1st linked e.g. 001h node … T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 89: Resources List

    "long mes‐ 0 to 7FFFh sage". Read access: 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 90: Node

    Number of linked nodes n RID of the first linked node … T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 91 Defining value Offset Value 002h Resource name "MONITOR" 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 92 Indirect read access to the counter node returns information on linked nodes (see table 47). T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 93: Identification Resources

    Defining value Offset Value 080h Resource name "ENCTYPE" 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 94 For this resource, access to the offset base is not meaningful as the size of the resource data is smaller than the maximum for a "long message" transaction. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 95 Direct read access to type name returns the defining values: 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 96 Read access level Write access level Time overrun T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 97 The device version is given in the following format: 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 98 Decimal point as separator '01' to '31' Firmware date day T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 99: Monitoring Resources

    8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 100 Wait for FREL = 1 Read Min. temp. Max. temp. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 101 Direct read access to sensor monitor range returns the defining values: Defining value Offset Value 0C2h 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 102 Offset Value 0C4h Resource name "SUPRANGE" Data size T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 103 Resource name "SUPVOLT" Data size Read access level 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 104 7.3). The rotation speed range value is given in the following format: T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 105 For this resource, access to the offset basis is not meaningful as the resource data can be read using a "long message" transaction. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 106 Transaction Register Write Wait for FREL = 1 T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 107 Length of the mes‐ Return values sage 0000h Operating time 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 108 It is recommended to read out the additional error code in byte 14. This additional error code is product specific and supports the SICK diagnostic capabilities T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 109 Transaction Register Write Wait for FREL = 1 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 110 The identification of the histogram class depends on the encoder parameter selected (see the following table). T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 111 12.0 to 13.0 V 13.0 to 14.0 V > 14.0 V 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 112 20 to 30°C Write Wait for FREL = 1 T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 113: Code Disk Position Range

    2: rotor position in +Z axis exceeds boundary 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 114: Administration Resources

    Defining value Offset Value 100h Resource name "RESET" T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 115 This funtion must be finalized by a reset of the encoder (RID 100h). 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 116 WARNING An encoder reset has to be carried out afterwards in order to validate the changes. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 117 "long message" transaction. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 118 A read access to this resource is not possible. The offset value indicates the target access level of the key change. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 119 Warning if monitored resource bit is deleted Warning if monitored resource bit is set 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 120 Write Wait for FREL = 1 Transaction Register T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 121 A read access to this resource is not possible. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 122 Table 141: Reading the current user-defined encoder index (in this example: 00h) Transaction Register Write T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 123 Register Write Wait for FREL = 1 Read 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 124: Counter Resources

    Defining value Offset Value 121h Resource name "INCCOUNT" T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 125 Register Write Wait for FREL = 1 Read 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 126: Data Storage Resources

    (when less than 8 bytes) is indicated by the character "\0" (00h). It should be noted that upper or lower case characters are valid. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 127 The largest address allowed for this attachment of data is the size of the file. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 128 Reserved for later use 0, bits 7 to 4 Write access rights T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 129 Time overrun Data type 0Bh - string Mandatory 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 130 5 – 14 Reserved for later use No write operation permitted T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 131 Data type 18h – structure with 8 bytes Mandatory 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 132 # file Empty Used store store 1E40h 0123h T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 133: Sensorhub Resources

    (see chapter 7.6.4, error 41h). 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 134 Data type 14h – 4 byte structure Mandatory T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 135 00 00 00 00 Wait for FREL = 1 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 136: Fpga Ip-Core

    Minimum reset duration after switch on/loading 20 ns HIPERFACE DSL ® interface T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 137 Characteristics of the interface Wire transmission rate 9.375 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 138 Input Drive cycle for position sampling trig‐ T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 139: Interface Blocks

    The figure below shows possible combinations of interface blocks. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 140: Serial Interface Block

    Figure 36: Serial interface block signals T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 141 When accessing the SPI interface, the following specifications for time control must be adhered to: 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 142 Online-status – Low byte REG DATA Register content T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 143 With each register data byte, the IP Core raises the addresses automatically. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 144 T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 145: Parallel Interface Block

    EMIFA: Address bus dsl_di(15:0) Input EMIFA: Data bus input 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 146 The assignment of the signals between Host (interfaces master with EMIFA signals) and DSL Master (interfaces slave) should appear as follows: T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 147 In addition to the EMIFA signals, the signals are imple‐ dsl_freeze dsl_8n16 mented. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 148: Basic Interface Specification

    Therefore, when implementing the fastest possible communi‐ cations, the user needs to be aware of these timings. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 149 The write flag should be kept high until has reached “011”. bit_period 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 150: Register Assignment

    14h (15:8) VEL0 16h ( 7:0) 14h ( 7:0) T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 151: Implementation Of The Ip Core For Xilinx Spartan-3E/6

    Timing requirements (clk periods) 13 ns 13 ns 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 152 IP core, wrapper, timing con‐ top.ucf straints Spartan-6 wrapper_n_bus.vhd wrapper_n_bus.xise wrapper_n_spi.vhd wrapper_n_spi.xise T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 153 All the tools listed have been installed on the development computer. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 154 SPI interface in Xilinx ISE 12.1. Start "ISE Project Navigator". Open the "Standard" project file. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 155 The "ISE Project Navigator" should appear as follows: Start the circuit synthesis: 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 156: Installation Of The Ip Core For Altera Fpgas

    VHDL files. These can be used for synthesis on all Altera FPGAs of sufficient size. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 157 IP Core and the interface blocks. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 158 Please note: If you import the time lines from the associated qsf file into Quartus II, set the following options in the "Advanced Import Settings" dialog box: T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 159 Under the entry "License file", select the associated license file: 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 160 FPGA IP-CORE T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK Subject to change without notice...
  • Page 161: Dsl Component Interoperability

    For further information please refer to chapter 7.3.1. 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 162 Within the cable certain measures are taken to prevent the data lines from disturbing electrical noise. At the connection point the data wires need to be T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 163 EMC noise impact: 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 164: Motor Recommendations

    Long loops of these leads shall be avoided. T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 165 Temperature sen‐ Ω/K 0 ... 255 sor coefficient ΔR/Δδ 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 166: Recommendations For Connection Line

    – one should be suitable for most of the cases. Requirements for couplings: T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ®...
  • Page 167 Monitor the online_status_d register bit for POS, DTE and QMLW 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 168: Recommendations On Installation Site

    T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 169: Index

    Quality monitoring........ 32, 32, 35, 37, 40, 60, 61, 84 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 170: Glossary

    Very high speed integrated circuit Hardware Description Language (hardware abstrac‐ tion language for FPGAs) T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® 8017595/ZTW6/2018-01-15 | SICK...
  • Page 171: Versions

    Improvement of error handling list see table 42 8017595/ZTW6/2018-01-15 | SICK T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL ® Subject to change without notice...
  • Page 172 Phone +36 1 371 2680 Phone +386 591 788 49 E-Mail office@sick.hu E-Mail office@sick.si India South Africa Phone +91 22 6119 8900 Phone +27 11 472 3733 Further locations at www.sick.com E-Mail info@sick-india.com E-Mail info@sickautomation.co.za SICK AG | Waldkirch | Germany | www.sick.com...

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