Freescale Semiconductor 68HC11 Technician Manual

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Summary of Contents for Freescale Semiconductor 68HC11

Page 2 c h a p t e r Introduction to Computer Hardware Objectives I ntrodu c t ion to Comput er H ardware After completing this chapter, you should be able to: ◗ Describe the fundamental elements of every computer system: proces- sor, memory, and input/output ◗...
Page 3 Technician’s Guide to the 68HC11 Microcontroller Introduction Computer systems have been developed for a variety of functions and purposes. General-application desktop machines are the most common. They run a variety of software applications, such as word processing, financial management and data processing.
Page 4 Introduction to Computer Hardware HC11 Hardware Block Diagram The HC11 is a computer system on a single chip that contains the three functional blocks of a computer system. Its internal central processor is a member of the 6800 family of processors; it has on-board memory and sophisticated on-chip input/output capabilities.
Page 5 Technician’s Guide to the 68HC11 Microcontroller NOTE: Throughout this text, references to the HC11 presume the M68HC11E9 version of the chip; thus, the shorter, more general name “HC11” will be used, unless otherwise specified. Central Processor The processor is the device at the center of the machine. It has the responsibility to execute instructions, manipulate data and perform arithmetic functions.
Page 6 Introduction to Computer Hardware Busses The processor communicates with the memory and I/O via busses. On a computer, a bus is a set of two or more conductors that are grouped together to form a parallel information path to and/or from the processor. The bus size, given in bits, is a measure of the number of conductors that can be active simultaneously on the bus.
Page 7 Technician’s Guide to the 68HC11 Microcontroller Self-Test Questions 1.1 1. What are the three main hardware components of a computer? 2. What is the function of each of the three hardware components of a computer? 3. What connects the three hardware components and allows the data, addresses and control signals to move between these components? 1.2 Elements of Processors...
Page 8 Introduction to Computer Hardware to the control block, as shown in Figure 1.4. The HC11 has an ALU that can perform operations on 8-bit and 16-bit data. Processor Registers The processor registers are a set of registers needed to perform the instruction execution.
Page 9 Technician’s Guide to the 68HC11 Microcontroller the address bus. If the processor has a 16-bit address bus, the program counter is a 16-bit register. Instructions require one or more bytes of memory for their completion; therefore, the program counter must be capable of incrementing through memory as the instructions are executed.
Page 10 Introduction to Computer Hardware Addresses Internal Control Control from Processor to/from Registers Data Bus Registers Control Unit Instruction Decoder Address Data Control Connection to the Devices Outside of Processor Figure 1.6 Components of the Processor Control Block cycle and deposited into this register. The opcode remains in this register until it is overwritten by the opcode for the next instruction.
Page 11 Technician’s Guide to the 68HC11 Microcontroller instructions, the HC11 supports many additional instructions. The HC11 supports 16-bit by 16-bit divide instructions, twelve instructions that support bit-manipulation, and various instructions that support a second address register (Y), none of which was available on the original 6800.
Page 12 Introduction to Computer Hardware Accumulator D (A:B). A 16-bit register that is the two 8-bit accumulators joined together (the colon between A and B indicates the joining of the two registers). It is not a separate hardware register. Although the HC11 is technically an 8-bit processor, several instructions are provided that allow 16-bit operations.
Page 13 Technician’s Guide to the 68HC11 Microcontroller MODB MODA Mode Single Chip Expanded Bootstrap Test Figure 1.8 Hardware Mode Select ( courtesy of Motorola ) to allow loading of permanent programs and other production related programming tasks. NOTE: This text focuses only on the normal modes and primarily on operation in the single chip mode.
Page 14 Introduction to Computer Hardware $0000 16K device $3FFF $4000 unused $FFFF Figure 1.9 Example of Memory Map Equation 1.1. The HC11 uses a 16-bit address. Therefore, it can address 2 or 64K unique memory locations. # of unique addresses = 2 Equation 1.1 where n is the number of address bits in the system.
Page 15 Technician’s Guide to the 68HC11 Microcontroller Processor $ 0005 $ CF Address Data Control Data is Address is Memory copied decoded from from address bus. data bus to selected memory $ CF location. Figure 1.10 Processor Write Operation Processor $ 0007...
Page 16 Introduction to Computer Hardware 1.4 Memory Types The physical memory locations can be represented by various types of memory devices. Two different types of memory made from semiconductor materials will be described: volatile and nonvolatile. Volatile memory is a memory that retains the data only when the power is applied.
Page 17 Technician’s Guide to the 68HC11 Microcontroller $ 0000 0000 $ 0200 512 BYTES RAM 01FF $ 0FFF $ 1000 1000 64-BYTE REGISTER $ 1040 BLOCK 103F AVAILABLE EXPANDED MEMORY B600 $ B5FF 512 BYTES EEPROM B7FF $ B600 $ B800...
Page 18 Introduction to Computer Hardware MONITOR VIDEO PORT COMPUTER SYSTEM SERIAL PORT SERIAL PORT PARALLEL PORT PARALLEL PORT SCANNER PRINTER Figure 1.13 I/O Devices Connected to a Computer System designed to allow two-way transfer of data as a serial data stream. Serial means one bit is transferred at a time over a single wire or line.
Page 19 Technician’s Guide to the 68HC11 Microcontroller Figure 1.14 HC11 I/O Ports ( adapted with permission from Motorola ) See chapter 12 for explanation of the Port A timing system. Port B is an 8-bit general-purpose output port. Port C is an 8-bit general-purpose port that can be configured for either input or output operation.
Page 20 Introduction to Computer Hardware Self-Test Questions 1.5 1. What is a port? 2. What is the difference between a serial and a parallel port? 3. Why are analog interfaces needed? 4. How many I/O ports are contained on the HC11? What are they? 1.6 EVBU / BUFFALO A full explanation of the function of the EVBU is presented in the Universal Evaluation Board User’s Manual.
Page 21 Technician’s Guide to the 68HC11 Microcontroller available for user programs. The ROM on the EVBU contains the system control program. NOTE: BUFFALO is located in the on-chip ROM from $E000 through $FFFF. It uses some of the on-chip RAM as temporary memory. User programs must not use RAM between $0030 and $00FF, to avoid conflicts with the system temporary space.
Page 22 Introduction to Computer Hardware Basic EVBU Function The BUFFALO monitor program controls the HC11 within the environment created by the EVBU hardware. The user can type commands at the BUFFALO prompt that tell BUFFALO to perform a variety of memory operations and control functions. For example, BUFFALO provides a command that allows the user to display a block of memory to the screen.
Page 23 Technician’s Guide to the 68HC11 Microcontroller Command Usage Description MD<Start><End> Memory Display: Displays successive memory locations in rows of 16 bytes starting with the start address <Start> and ending with the row that contains the ending address <End>. MM<Address> Memory Modify: Display a Single byte of memory specified by <Address>...
Page 24 Introduction to Computer Hardware Example 1.3 Problem: Use the BUFFALO monitor commands to display the data stored in the processor registers. Modify the contents of the X register to be $1000 and AccA to be $3B. Redisplay the contents of these registers to verify that the changes took place.
Page 25 Technician’s Guide to the 68HC11 Microcontroller Chapter Questions Section 1.1 1. What are the three major components of a computer system? Why are all of the components necessary in an operational computer system? 2. How does the HC11 meet the functional components of a computer system (processor, memory and I/O)? 3.
Page 26 Introduction to Computer Hardware 25. How many ports are available on the HC11? 26. What types of I/O functions are supported by the ports on the HC11? Section 1.6 27. What is the EVBU? What is its purpose? 28. What is BUFFALO? What is its purpose? 29.
Page 27 Technician’s Guide to the 68HC11 Microcontroller Section 1.5 1. A port is an I/O connection that allows data to move between the computer and a variety of peripheral devices. 2. A serial port transfers data one bit at a time on a single wire. A parallel port transfers data multiple bits at a time via multiple wires.
Page 28 c h a p t e r Introduction to Computer Software Objectives I ntrodu c t ion to Comput er So ftware After completing this chapter, you should be able to: ◗ Describe the difference between source code and machine code ◗...
Page 29 Technician’s Guide to the 68HC11 Microcontroller order in which these operations are completed. This chapter will introduce some concepts behind the software that controls the hardware. 2.1 Programming the Computer A program is a detailed list of steps that must be followed to complete a task. Many jobs in life follow the same steps each time they are accomplished.
Page 30 Introduction to Computer Software Relative Level of Programming Language Highest Lowest Level Level BASIC ASSEMBLER MACHINE CODE ENGLISH BASIC ASSEMBLER MACHINE if X is equal if (X == Y) then if (X == Y) LDAA to Y, then set Z = X Z = X;...
Page 31 Technician’s Guide to the 68HC11 Microcontroller Machine Code There is only one language that the computer hardware understands, machine language. The machine language is made up of machine code. The machine code is multibit binary codes that tell the computer the specific tasks it is to perform. Machine code is the lowest level of all computer languages.
Page 32 Introduction to Computer Software Offsets are commonly used to allow addressing of memory without specific reference to the entire address. Programs that use offsets typically result in less actual machine code because the offsets are smaller than complete addresses. Since these programs occupy fewer bytes of memory, often they will execute faster.
Page 33 Technician’s Guide to the 68HC11 Microcontroller the HC11 has 308. The designers of the HC11 built in a mechanism that allows for each of the 308 instruction opcodes to be properly handled. Some of these instructions require an additional opcode byte, which is called a prebyte. The prebyte directs the instruction decoder to perform two fetch cycles.
Page 34 Introduction to Computer Software Instruction: Load AccA with contents of memory (M) ⇒ AccA, using immediate addressing AccA opcode operand operand immediately follows opcode in memory. AccA IR receives this code—decoder causes next byte to be loaded into AccA. Figure 2.3 Loading AccA Using Immediate Addressing immediate mode.
Page 35 Technician’s Guide to the 68HC11 Microcontroller Instruction: Load AccA with contents of memory (M) ⇒ AccA, using absolute addressing Operand is located in memory at address supplied by AccA instruction opcode address operand address of operand AccA $0120 $0120 IR receives this code—decoder causes...
Page 36 Introduction to Computer Software Instruction: Load AccA with contents of memory, using indexed addressing. AccA M = X + offset opcode offset Memory address operand AccA Offset Memory IR receives this code— 0100 $0120 decoder causes address M to be calculated from (X) + offset, then actual operand is loaded into AccA from (M).
Page 37 Technician’s Guide to the 68HC11 Microcontroller Instruction: Branch to new location in program. relative opcode opcode operand opcode operand address 0100 0101 0102 0103 0104 0105 memory location (address) opcode operand opcode operand address of IR receives this this instruction code–decoder causes...
Page 38 Introduction to Computer Software Operand Mode Name Abbreviation Field Description Inherent Empty Memory access is not required. Operand is implied by the instruction. Operand field is empty. Immediate Operand is contained in the memory location(s) following opcode (ii), which is the operand field. Extended hhll Operand contained in memory location pointed to...
Page 39 Technician’s Guide to the 68HC11 Microcontroller Address Machine Code Source Code Comments ;$29 → A 0000 86 29 LDAA #$29 operand opcode mnemonic M = PC + 1 operand (ii) = 0001 pound sign (ii) indicates imm mode Address Machine Code...
Page 40 Introduction to Computer Software Address Machine Code Source Code Comments ;($000B) → A 0005 b6 00 0b LDAA $000B opcode mnemonic M = hhll effective effective = 000B address of address of operand operand (hhll) (hhll) Address Machine Code Source Code Comments ;($000C) : ($000D) →...
Page 41 Technician’s Guide to the 68HC11 Microcontroller Address Machine Code Source Code Comments ;($000B) → A 0010 LDAA opcode mnemonic M = 00dd low byte of low byte of effective address effective address of operand (dd) of operand (dd) Address Machine Code...
Page 42 Introduction to Computer Software Address Machine Code Source Code Comments ;(M) → A 0020 a6 02 LDAA $02,X opcode mnemonic index register M = (X) + ff to be used for (if X = $1000, offset offset effective address then (ff) (ff) calculation...
Page 43 Technician’s Guide to the 68HC11 Microcontroller 2.4 Processing Instructions When the processor comes out of reset, it initializes the program counter, then immediately begins to execute instructions. The first step is to read an instruction opcode from memory. The opcode is an 8-bit code that tells the processor which instruction to execute and which addressing mode to use.
Page 44 Introduction to Computer Software program counter. A fetch cycle is the first machine cycle for each instruction. A new fetch cycle is started automatically following the completion of the previous instruction. The fetch cycle starts by moving the contents of the program counter to the memory address register.
Page 45 Technician’s Guide to the 68HC11 Microcontroller Execute Cycles After the opcode is decoded, the processor methodically executes the instruction. The execution requires one or more machine cycles, which are called execute cycles. Each execute cycle is a built-in sequence of events that completes the operation of the instruction.
Page 46 Introduction to Computer Software NOTE: Each instruction requires at least two machine cycles to complete, one fetch cycle and one execute cycle. Some require as many as 41, 1 fetch and 40 executes. Assume that memory location $019B contains $36 before the start of this program.
Page 47 Technician’s Guide to the 68HC11 Microcontroller Operation Description Functional Result (A) + (B) → data bus $A8 + $36 → data bus Execute ABA Operands are read from registers and Result → A $DE → A (1 machine cycle) added.
Page 48 Introduction to Computer Software subroutine used to show a terminator used to show start subroutine process and end of program on-page shows flowchart process used to show connector continues on a process same page input/output used to show any off-page shows flowchart data input/output connector...
Page 49 Technician’s Guide to the 68HC11 Microcontroller Answer Phone COUNT Count Ring 3 Rings? Pick Up Phone "Hello" Salesman? 10 ms Delay Have Load Conversation Counter WAIT Decrement "Goodbye" counter SKIP Hang up Counter = 0? Figure 2.18 Flowchart for Answering Figure 2.19 Flowchart of a 10 ms...
Page 50 Introduction to Computer Software The processor must access memory on a regular basis to read and write the data that is processed by the instructions. Each processor supports several methods it can use to access the memory called memory addressing modes. Some of the addressing modes are called immediate mode, direct mode, indexed mode and relative mode.
Page 51 Technician’s Guide to the 68HC11 Microcontroller 21. What happens to the PC during the second step of the fetch cycle? 22. After the processor fetches an opcode from memory, which processor register holds the opcode while it is being decoded? 23.
Page 52 Introduction to Computer Software the effective address of the operand. When using relative addressing mode, the value following the mnemonic is the displacement. The displacement is the relative distance to the next instruction. 3. Relative addressing mode is always used to change the flow of the program. Section 2.3 1.
Page 54 c h a p t e r HC11 Programming Objectives HC11 P rogramming After completing this chapter, you should be able to: ◗ Define the five Condition Code Register Status Flags ◗ Write simple programs that move data via load, store and transfer in- structions ◗...
Page 55 Technician’s Guide to the 68HC11 Microcontroller Introduction The instructions are the commands that control what the processor does. Without the instructions, the processor is nonfunctional. The instruction set on the HC11 consists of 308 unique opcodes derived from 145 mnemonic key words. Many of the mnemonic instructions operate in more than one addressing mode.
Page 56 HC11 Programming Register Size Designation Register (bits) Accumulator A Accumulator B Condition Code Register (CCR) Double Accumulator D (A:B) Stack Pointer Register Index Register X Index Register Y Figure 3.1 Register Designations Used by HC11 Instruction Mnemonics 3.1 Condition Code Register Status Flags In chapter 1, the condition code register is introduced as one of the registers in the programmer’s model.
Page 57 Technician’s Guide to the 68HC11 Microcontroller ADDITION LAYOUT SUBTRACTION LAYOUT Full Carry Half Carry Borrow C = 1 H = 1 C = 1   Negative Negative N = 1 N = 1 If all Zero If all Zero...
Page 58 HC11 Programming Processor Memory LDAA LDAB 1 byte 1 byte 2 bytes 2 bytes 2 bytes Figure 3.4 Direction of Data Movement During a Load Instruction to do. The program must load the addresses and data into the processor required to complete the execution of the program.
Page 59 Technician’s Guide to the 68HC11 Microcontroller Each load instruction operates in IMM, DIR, EXT, INDX and INDY addressing modes. All load instructions affect only three status flags in the CCR: N and Z reflect the actual condition of the data that was loaded. The V bit is cleared, indicating that the sign (N flag) is correct.
Page 60 HC11 Programming a. LDAB #$16 b. LDX $10 c. LDY $0123 d. LDAA $B600 Solution: a. Bytes = 2. LDAB IMM will occupy two bytes, the first byte is the opcode and the second is the operand (ii). Opcode = $C6. Cycles = 2, 1 fetch and 1 execute. b.
Page 61 Technician’s Guide to the 68HC11 Microcontroller Mnemonic Description Function IMM DIR EXT INDX INDY INH (A) ⇒ M STAA Store Acc to (B) ⇒ M STAB contents of memory (A) ⇒ M, Store D to contents (B) ⇒ M+1 of memory (S) ⇒...
Page 62 HC11 Programming c. Mode = DIR. The single byte in the operand field without # sign. Effective addresses = $0008 and $0009. First effective address in direct mode is equal to $00dd (M), second is M+1. Operand = $0041. Data from SP. N = 0, Z = 0, V = 0. Thus CCR = $E1. Example 3.4 Problem: Each store instruction occupies a fixed number of bytes in memory and requires a fixed number of machine cycles to execute.
Page 63 Technician’s Guide to the 68HC11 Microcontroller Memory to Memory copy Load value from memory Store value into memory Example 3.5 Flowchart program reads the byte stored at location $0100 and loads it into AccA. Then it takes the value from AccA and writes it out to memory location $0180.
Page 64 HC11 Programming Mnemonic Description Function IMM DIR EXT INDX INDY INH REL (A) ⇒ B Transfer Acc to the (B) ⇒ A other Acc (A) ⇒ CCR ↓ Transfer A to CCR (CCR) ⇒ A Transfer CCR to A (S) + 1 ⇒ X Transfer Stack (S) + 1 ⇒...
Page 65 Technician’s Guide to the 68HC11 Microcontroller Mnemonic Description Function IMM DIR EXT INDX INDY INH D ↔ X XGDX Exchange D with D ↔ Y XGDY Index Reg Note: D ↔ X implies that (D) → X while the original (X) → D.
Page 66 HC11 Programming Mnemonic Description Function IMM DIR EXT INDX INDY INH REL (A) + (M) ⇒ A ADDA Add contents of (B) + (M) ⇒ B ADDB memory to Acc ADDD Add contents of (D)+(M):(M+1) ⇒ D memory to D (A) + (B) ⇒...
Page 67 Technician’s Guide to the 68HC11 Microcontroller c. Mode = DIR. The single byte in the operand field without # sign. Effective addresses = $0029 and $002A. First effective address in direct mode is equal to $00dd (M) and second is M+1. (D) + ($0029):($002A) = $802F + $2233 = $A262 →...
Page 68 HC11 Programming Example 3.8 Load value from memory Add $30 to first value Store result in memory Example 3.8 Flowchart loads the result back into AccB. Finally, using extended mode, it stores the result in location $0121. Address Machine Code Source Code Comments ;($0000) →...
Page 69 Technician’s Guide to the 68HC11 Microcontroller Upper Half- Initial Half- Lower Half- Number Added State of C Bit Byte of Acca Carry H Bit Byte of Acca to Acca by State of C Bit Before DAA (Bits 7–4) from CCR (Bits 3–0)
Page 70 HC11 Programming Example 3.9 Load 25 BCD Add 37 BCD to 25 BCD Decimal adjust the result Example 3.9 Flowchart Increment Instructions Increment instructions are a special class of addition instructions. They add one to the operand, then overwrite the previous operand with this result. The increment instructions are summarized in Figure 3.13.
Page 71 Technician’s Guide to the 68HC11 Microcontroller No sample code is provided at this point for increment and decrement instructions. However, several examples in chapters 4 and 5 use increment instructions. Self-Test Questions 3.3 1. Which flag bit is only affected by addition instructions? 2.
Page 72 HC11 Programming Example 3.10 Problem: Describe what each of the following instructions accomplishes and then indicate the addressing mode used, effective address(es) of the operand, the result and resulting status in the CCR, given the following: 0028 81 22 33 4A 55 6B C7 88 0160 FF 00 D6 00 10 1F 10 0F $B600...
Page 73 Technician’s Guide to the 68HC11 Microcontroller Solution: a. Bytes = 2. SUBB IMM will occupy two bytes; the first byte is the opcode and the second is the immediate data (ii). Opcode = $C0. Cycles = 2, 1 fetch and 1 execute.
Page 74 HC11 Programming Mnemonic Description Function IMM DIR EXT INDX INDY INH REL $00 – (A) ⇒ A NEGA 2’s Complement of $00 – (B) ⇒ B NEGB $00-(M) ⇒ M 2’s Complement of contents of memory Figure 3.15 Negate Instructions Negate Instructions The negate instructions change the sign of a value in AccA, in AccB or in a memory location.
Page 75 Technician’s Guide to the 68HC11 Microcontroller are decremented by the DECA, DECB, DES, DEX and DEY instructions respectively. The DEC, DECA and DECB instructions affect three status flags in the CCR: N, Z and V reflect the actual condition of the data after the decrement operation. The DEX and DEY instructions affect only one flag: Z is updated to reflect the actual condition of the data after the decrement.
Page 76 HC11 Programming (AccA) AccA This 8-bit result will be loaded back into the accumulator, overwriting the previous data. R = (A) Figure 3.18 Logical AND Operation on the HC11 (ANDx). The 8-bit contents of AccA is ANDed as bit pairs with the 8-bit contents of a memory location. Eight 2-input AND gates are used for the operation.
Page 77 Technician’s Guide to the 68HC11 Microcontroller and INDY addressing modes, as shown in Figure 3.19. No support is provided for the DIR addressing mode. These instructions affect four status flags in the CCR: N and Z reflect the actual condition of the data after the logic operation, V = 0 indicates that the sign of the result is correct and C is set.
Page 78 HC11 Programming 3.6 Shifting and Rotating Several types of data shifting and rotating instructions are supported on the HC11. Shifting of data is based on the principles of serial shift registers. Data is moved one bit to the right (toward the LSB) or one bit to the left (toward the MSB). Logical shifting, as well as arithmetic shifting, is supported.
Page 79 Technician’s Guide to the 68HC11 Microcontroller Before LSL 1 0 1 0 0 1 1 1 Data = $A7, C = 0 After LSL 1 0 0 1 1 1 Data = $4E, C = 1 a) 8-bit Logical Shift Left...
Page 80 HC11 Programming Mnemonic Description Function IMM DIR EXT INDX INDY INH REL LSLA Logical shift left Acc See Figure 3.21 LSLB LSLD Logical shift left See Figure 3.21 contents of memory LSRA Logical shift right See Figure 3.22 LSRB LSRD Logical shift right See Figure 3.22 contents of memory...
Page 81 Technician’s Guide to the 68HC11 Microcontroller Address Machine Code Source Code B700 LSLA 002E 74 01 9A $019A 012C LSRD Solution: a. Mode = INH. Nothing in the operand field. Shift left $C7, make LSB 0, stuff MSB into C flag. Result $8E, C = 1. N = 1, Z = 0, V = 0, C = 1 → CCR = $D9.
Page 82 HC11 Programming Mnemonic Description Function IMM DIR EXT INDX INDY INH REL ASRA Arithmetic shift See Figure 3.24 ASRB right Acc Arithmetic shift See Figure 3.24 right contents of memory Figure 3.25 Arithmetic Shift Instructions the actual condition of the data after the operation. The V bit still indicates sign error for these instructions, even though a sign error cannot occur since the sign bit is retained.
Page 83 Technician’s Guide to the 68HC11 Microcontroller Before ROL 0 0 1 1 0 1 1 1 Data = $37, C = 0 After ROL 1 1 0 1 1 1 Data = $6E, C = 0 a) Rotate Left through Carry (C)
Page 84 HC11 Programming Mnemonic Description Function IMM DIR EXT INDX INDY INH REL ROLA Rotate left Acc See Figure 3.26 ROLB Rotate left contents See Figure 3.26 of memory RORA Rotate right Acc See Figure 3.26 RORB Rotate right See Figure 3.26 contents of memory Figure 3.27 Rotate Instructions memory location.
Page 85 Technician’s Guide to the 68HC11 Microcontroller Self-Test Questions 3.6 1. Which status flag bit is used by all shift and rotate instructions? 2. What is the difference between arithmetic shift and logical shift? 3. What type of rotate instruction is used when the data is shifting from the MSB to the LSB of the data word? 3.7 Multiplication and Division...
Page 86 HC11 Programming 01E7 000C 16-bit 16-bit $28R7 ↓ 40R7 $01E7 0028 0007 − − 16-bit 16-bit quotient remainder c) (D) / (X) → X, Remainder → D a) decimal longhand b) hex longhand Figure 3.30 HCII Integer Divide Integer Division Instruction IDIV calculates a 16-bit unsigned quotient from two 16-bit unsigned words.
Page 87 Technician’s Guide to the 68HC11 Microcontroller 0.1875 0003 0010 1 40 16-bit 16-bit − 1 28 ↓ 0.3000 − 3.00 3000 0000 − 0 00 16-bit 16-bit Remainder 0 Remainder 0 quotient remainder c) (D) / (X) → X, Remainder → 0...
Page 88 HC11 Programming Solution: a. This program multiplies two decimal numbers, 45 and 97. The numbers are converted into hex and loaded into AccA and AccB respectively. The MUL instruction multiplies the two 8-bit numbers to determine the 16-bit product that is loaded into AccD.
Page 89 Technician’s Guide to the 68HC11 Microcontroller Self-Test Questions 3.8 1. Can status flags in the CCR be directly modified by instructions? How? 2. What instruction is used to set the V flag? Summary Instructions tell the processor which functions should be performed. The order in which the instructions are presented to the processor determines the order in which the functions are performed.
Page 90 HC11 Programming Section 3.3 12. What condition causes the C flag to be set during an add instruction? 13. What condition causes the H flag to be set during an add instruction? 14. What actually takes place when the following instruction is executed: ADDA $0100? 15.
Page 91 Technician’s Guide to the 68HC11 Microcontroller 00F8 00 11 22 33 44 55 66 77 Registers Memory $B600 0100 F3 56 E3 DB A1 A0 09 00 $00A0 0108 22 44 52 88 63 77 74 33 $0110 0110 FF 00 FF 11 FF 22 FF 83...
Page 92 HC11 Programming 5. Draw a flowchart and write a program that will add $3C and $42 and store the sum at location $0020. 6. Draw a flowchart and write a program that will add the BCD values $26 and $39, perform the proper decimal adjust as needed and store the sum at location $0180.
Page 93 Technician’s Guide to the 68HC11 Microcontroller 3. When the V flag is set (V=1), a sign overflow has occurred which means that the sign of the previous result is wrong. Section 3.2 1. Load instructions are bringing data into the processor from memory, so they are read instructions.
Page 94 c h a p t e r Branching and Loops Objectives Bran c h ing and Loo ps After completing this chapter, you should be able to: ◗ Use branch and jump instructions in short programs ◗ Calculate the destination address when using branch instructions ◗...
Page 95 Technician’s Guide to the 68HC11 Microcontroller Introduction Chapter 3 focused on instructions that have various jobs of manipulating the data in the registers and in memory. This chapter will focus on a different class of instructions that have the job of controlling or altering the flow of a program. The function of the jump instruction is discussed first, followed by a presentation on the function of the branch instructions.
Page 96 Branching and Loops 0100 86 4b LDAA #$4B ;load a number into AccA 0102 8b 23 ADDA #$23 ;Add another to AccA 0104 7e 01 80 $0180 ;go store the result • ;additional instructions Destination • Address • 0180 b7 00 00 STAA $0000 ;store the sum...
Page 97 Technician’s Guide to the 68HC11 Microcontroller 0100 86 4b LDAA #$4B ;load a number into AccA 0102 8b 23 ADDA #$23 ;Add another to AccA 0104 20 7a $0180 ;go store the result • 0106 ;additional instructions Displacement • +007A •...
Page 98 Branching and Loops Operation Description Functional Result (PC) → MAR $0104 → MAR Fetch BRA opcode Contents of PC are copied (1 machine cycle) to MAR. (PC) + 1 → PC $0105 → PC PC is incremented. ($0105) → data bus $20 → data bus Opcode is read from memory.
Page 99 Technician’s Guide to the 68HC11 Microcontroller the displacement. How does the assembler calculate the relative address from the destination address? The answer is found by subtracting PC from both sides of Equation 4.1, as shown in Equation 4.2. DA = PC + rr Subtract PC from both sides DA –...
Page 100 Branching and Loops → DA = 010D $010D PC = $0109 + 2 → +$010B → rr = DA – PC $0002 rr = $02 → DA = 018E $018E PC = $0193 + 2 → +$0195 → rr = DA – PC $FFF9 rr = $F9 →...
Page 101 Technician’s Guide to the 68HC11 Microcontroller NOTE: When branching backward, the relative address is negative. It is the number of bytes of memory that will be skipped backward, starting with the relative address and going back to, and including, the byte stored in the destination address.
Page 102 Branching and Loops Boolean Conditional Complement Mnemonic Description Test Form Functional Group Branch always Always passes Unconditional Branch never Never passes Unconditional Branch if carry cleared (see BHS) ? C = 0 Conditional-simple Branch if carry set (see BLO) ? C = 1 Conditional-simple Branch if equal to zero ? Z = 1...
Page 103 Technician’s Guide to the 68HC11 Microcontroller Test 0 0 0 fail 0 1 1 pass 1 0 1 Test 1 1 0 fail N + V = 1 only when N and V are opposites, as shown in truth table.
Page 104 Branching and Loops Address Machine Code Source Code 01D9 2B 0C PAST 0112 25 53 LOOP B6C3 23 8B AGAIN E0F4 2E F2 AGAIN Solution: In each case, the processor must determine if the branch test passes or fails. In addition, the contents of the PC must be determined. If the test fails, DA = PC.
Page 105 Technician’s Guide to the 68HC11 Microcontroller are updated with the state of the data that was loaded. The C flag is also cleared by an LDAA instruction. A conditional branch instruction can immediately follow and perform branch tests relevant to the status recorded during the LDAA instruction.
Page 106 Branching and Loops signed number. If the first of the two numbers is the greater, the branch test will pass; otherwise, it will fail and the program will fall through. Since all conditional branch instructions test for some condition in the flags of the CCR, these flags must be updated prior to the execution of the BGT in order for a valid comparison to take place.
Page 107 Technician’s Guide to the 68HC11 Microcontroller instructions affect four status flags in the CCR: N, Z, V and C reflect the actual condition of the data after the compare operation. Example 4.5 Problem: Compare $43 to $56 and update the condition code flags.
Page 108 Branching and Loops provided for the DIR addressing mode. The compare instructions affect four status flags in the CCR: N and Z reflect the actual condition of the data after the compare operation. V = 0 and C = 0 because a sign error and borrow condition cannot occur when zero is subtracted from another number.
Page 109 Technician’s Guide to the 68HC11 Microcontroller Passes Condition? ELSE Fails Passes Process when Condition? condition is false ELSE Fails THEN Next sequential process Process when condition is true THEN a) Simple IF-THEN b) Complete IF-THEN-ELSE Figure 4.11 IF-THEN-ELSE Flowchart In some cases, there are specific operations for either condition, which must be performed.
Page 110 Branching and Loops * Absolute value function using IF-THEN-ELSE 0120 96 00 LDAA ;Get the value from memory 0122 2a 03 PAST ;IF positive, THEN do nothing 0124 40 NEGA ;ELSE change the sign 0125 97 00 STAA ;Overwrite the original value 0127 PAST .
Page 111 Technician’s Guide to the 68HC11 Microcontroller * Code to convert an ASCII code to BCD digit * ASCII $30 → BCD $0, $31 → BCD $1, etc. 0000 96 10 LDAA ;Get the ASCII code 0002 81 30 CMPA #$30 ;check code for BCD $0...
Page 112 Branching and Loops Test pass C flag fail Z flag Test C + Z = 0 only when C = 0 and Z = 0, as shown in the truth table. Figure 4.12 BHI Branch Test accomplished by subtracting $30 from the code via the SUBA instruction. The result of this process is the desired BCD value.
Page 113 Technician’s Guide to the 68HC11 Microcontroller WHILE Process False Condition? UNTIL True False Condition? Process True Continue Continue on to other on to other processes processes a) WHILE loop b) UNTIL loop Figure 4.13 WHILE and UNTIL Loop Flowcharts For example, while the window is open the wind blows in, yet the wind will blow in until the window is closed.
Page 114 Branching and Loops Initialize BACK LDX #$delay Counter BACK Count ≠ 0? WHILE BRA OUT Decrement Counter BRA BACK … Figure 4.15 Time Delay Using WHILE Structure The value loaded into the X register during the initialization of the count determines how long this function waits.
Page 115 Technician’s Guide to the 68HC11 Microcontroller Because it requires three machine cycles, it can be used in conjunction with the NOP to create and odd or even number of machine cycles within a timing loop. The NOP and BRN instructions can be used anywhere in a program to just wait two or three machine cycles.
Page 116 Branching and Loops Section 4.2 3. What effect does a branch instruction have on the program counter? 4. Are relative addresses signed or unsigned values? 5. What is the largest number of addresses that a program can branch forward? 6. What is the largest number of addresses that a program can branch backward? 7.
Page 117 Technician’s Guide to the 68HC11 Microcontroller 3. What is the conditional test for this branch instruction? Address Object Code 0148 2B E8 4. Use the instruction from Problem #3. If the “N” flag bit in the CCR is a “1,” what is the location of the next instruction that would be executed? 5.
Page 118 Branching and Loops → 4. DA = 01DD $01DD → +$0195 PC = $0193 + 2 → rr = DA – PC $0048 rr = $48 → +$E25A 5. DA = E25A → PC = $E273 + 2 $E275 → rr = DA –...
Page 120 c h a p t e r Indexing Through Memory Objectives After completing this chapter, you should be able to: I ndexin g Through Memory ◗ Calculate the effective address for an indexed mode instruction ◗ Perform summation on a list of numbers ◗...
Page 121 Technician’s Guide to the 68HC11 Microcontroller The indexed addressing mode provides a means of accessing data that is stored in banks, lists, look-up tables or any other sequential method of storage. Because it uses a base address as a reference point or starting point, only the offset is necessary to sequence through the memory one byte at a time.
Page 122 Indexing Through Memory Assume X Register contains $0100 for each of the following examples. Address Machine Code Source Code Comments ;(A) + ($0110) → A 0023 ab 10 ADDA $10,X opcode mnemonic Index offset offset Register (ff) (ff) combination is effective address of operand Address Machine Code...
Page 123 Technician’s Guide to the 68HC11 Microcontroller Operation Description Functional Result PC → MAR $0140 → MAR Fetch LDAA opcode PC is moved to MAR. PC + 1 → PC $0141 → PC (1 machine cycle) PC is incremented. Opcode → IR $A6 →...
Page 124 Indexing Through Memory Address Machine Code Source Code 0109 E6 E8 LDAB $E8,X 0100 AA 00 ORAA $00,X 01E2 18 6F 04 $04,Y E234 18 A7 04 STAA $30,Y Solution: In each case, the effective address (M) must be determined. Then the offset must be zero filled to 16 bits and added to the base address in the index register to calculate the effective address (Equation 5.1).
Page 125 Technician’s Guide to the 68HC11 Microcontroller a. This instruction must copy two bytes of data from memory to the SP. Therefore, two effective addresses must be calculated (M and M + 1) → X = $0140 $0140 → +$0002 ff = $02, zero filled →...
Page 126 Indexing Through Memory Summing a List Clear SUM Initialize Base Address in Index Register AGAIN Add number to previous sum Increment Base Address Finished? Store Sum Figure 5.4 Flowchart to Sum a List of Numbers: UNTIL Method NOTE: The source code listing for this example and all subsequent examples in the text will include sequential line numbers as the first column of the file.
Page 127 Technician’s Guide to the 68HC11 Microcontroller summation is finished. The ADDA instruction will always offset $00 bytes from the base address. This offset is fixed; however, as the base address can change in the X register, this instruction can access a different memory location each time it is executed in the loop.
Page 128 Indexing Through Memory Summing a List Clear Sum Initialize Base Address in Index Register AGAIN Finished? Add number to previous sum Increment Base Address STORE Store Sum Figure 5.6 Flowchart to Sum a List of Numbers: WHILE Method memory. The program uses a CPX instruction to compare the value in the X register to the address following the list ($0010).
Page 129 Technician’s Guide to the 68HC11 Microcontroller the CCR will be set. The branch test for the BEQ is “?Z = 1,” which will pass, and the program will branch to the STORE section of the code. At this point, the sum is stored in the next memory location and the program is complete.
Page 130 Indexing Through Memory 0001 *Program to find largest number in a list 0002 *using index mode 0003 0004 0140 4f CLRA ;Clear Reference 0005 0141 ce 01 d4 #$01D4 ;Initialize Base Address 0006 0144 a1 00 LOOP CMPA $00,X ;Compare number to reference 0007 0146 25 02 OVER ;If lower, don't replace!
Page 131 Technician’s Guide to the 68HC11 Microcontroller Self-Test Questions 5.3 1. In addition to the WHILE loop, what programming structure is used by this program? 2. How many times will the LDX instruction in line 5 be executed? 3. Why is the CLRA instruction in line 4 necessary? 5.4 Counting the Number of Positive Numbers...
Page 132 Indexing Through Memory 0001 *Program to count the positive numbers 0002 *in a list using index mode 0003 0004 0160 4f CLRA ;Clear COUNT 0005 0161 ce 01 80 #$0180 ;Initialize the base address 0006 0164 e6 00 LOOP LDAB $00,X ;Get a number 0007 0166 2b 01...
Page 133 Technician’s Guide to the 68HC11 Microcontroller Copy a Block Initialize Source Address Initialize Dest. Address COPY Get a number Store the number in Destination Increment Pointer Finished? Figure 5.12 Flowchart to Copy a Block of Numbers each destination location one-by-one, until the entire block is copied. The load instruction in line 6 reads the source data from memory and temporarily holds it in AccA.
Page 134 Indexing Through Memory Self-Test Questions 5.5 1. Since two index registers are being used, what is the maximum distance between the source and destination ranges? 2. Why are there four bytes of machine code listed for the CPY instruction on line 10 of Figure 5.13? 3.
Page 135 Technician’s Guide to the 68HC11 Microcontroller Registers Memory 00F8 00 11 22 33 44 55 66 77 $B600 0100 F3 56 E3 DB A1 A0 09 00 $0100 0108 22 44 52 88 63 77 74 33 $0016 0110 FF 00 FF 11 FF 22 FF 83...
Page 136 Indexing Through Memory 3. All instructions that require two-byte memory access require two effective addresses. The first of the two addresses (M) is calculated using Equation 5.1. The second is simply M + 1. Section 5.2 1. The offset is fixed in memory, but the HC11 provides instructions to increment the addresses in the index registers.
Page 138 c h a p t e r Subroutines Objectives After completing this chapter, you should be able to: Sub rou tines ◗ Use push and pull instructions to move data to and from the stack ◗ Organize code into subroutines ◗...
Page 139 Technician’s Guide to the 68HC11 Microcontroller not have to be executed in the exact sequential order in which it resides in memory. This chapter presents a method of modularizing the code within a program. This method groups the instructions into functional groups, where each group completes a task.
Page 140 Subroutines a block of sequential locations in memory. The first location used is the bottom of the stack, in the same way the first plate is on the bottom of the stack. This becomes the highest address location in the stack. The last location, or the top of the stack, will be the lowest address location used by the stack, as shown in Figure 6.1b.
Page 141 Technician’s Guide to the 68HC11 Microcontroller Mnemonic Description Function IMM DIR EXT INDX INDY INH (S) + 1 ⇒ S PULA Increment S, Pull 8- ) ⇒ A bits from Stack into AccA (S) + 1 ⇒ S PULB Increment S, Pull 8- ) ⇒...
Page 142 Subroutines c. $0036 → S, ($0036) → X , $0037 → S, ($0037) → X PULX increments the stack pointer to point to the last location used on the stack ($0036). It then reads the contents of location $0036 from memory and loads the low byte of the X register with the data ($77).
Page 143 Technician’s Guide to the 68HC11 Microcontroller The JSR instruction is similar to JMP in that it uses an absolute 16-bit address to point to the address of the first instruction of the subroutine. The BSR is similar to BRA in that it uses an 8-bit relative mode offset to point to the address of the first instruction of the subroutines.
Page 144 Subroutines is decremented one more time so that it continues to point to the next available location on the stack. After the return address is pushed onto the stack, the program counter is loaded with the address of the first instruction of the subroutine. The JSR and BSR instructions acquire this starting address from the effective address included with the instruction.
Page 145 Technician’s Guide to the 68HC11 Microcontroller instruction. This return address must be pulled from the stack in order to know the address of the next instruction to execute. The last instruction of each subroutine must be the RTS instruction, because the RTS instruction pulls the return address from the stack and loads it into the program counter.
Page 146 Subroutines Instructions in main program JSR DELAY Instructions DELAY in delay subroutine JSR DELAY JSR DELAY Figure 6.6 Example of a Subroutine NOTE: In-line code executes faster than the equivalent application using subroutines. Therefore, the in-line code uses time more efficiently. Subroutines typically use less memory than the equivalent in-line implementation.
Page 147 Technician’s Guide to the 68HC11 Microcontroller must be provided the hex value that will be converted. In the same manner, subroutines often have the need to return data to the calling program. When the conversion is completed by the hex-to-ASCII conversion subroutine, the ASCII character code must be returned to the calling program.
Page 148 Subroutines ;duplicate value (A) → B 0001 0180 16 SQUARE ;square value, (A) x (B) → D 0002 0181 3d 0003 0182 39 ;return to calling program In some cases, subroutines do not require any data from the calling program. They perform operations that are independent of the data being processed.
Page 149 Technician’s Guide to the 68HC11 Microcontroller Self-Test Questions 6.3 1. What is a simple method of passing a value to a subroutine? 2. If a value is passed by reference, what addressing mode must be used to access the value in memory? 3.
Page 150 Subroutines HEX to ASCII Compare digit to $F Digit > $F? Compare digit to $A Digit < $A? Add $07 to code for alpha digits SKIP Finish conversion to ASCII (Add $30) Return Figure 6.9 Flowchart of Hex-to-ASCII Conversion Subroutine a difference results with a distinct pattern.
Page 151 Technician’s Guide to the 68HC11 Microcontroller * Subroutine to convert the lower hex digit ($0-$F) of a byte in AccA * to ASCII equivalent. Return ASCII of digit in AccA. 0120 81 0f HEX2ASC CMPA #$0F ;Is digit > $F? 0122 22 08 ;Value not single hex digit...
Page 152 Subroutines Excessive nesting also leads to excessive overhead costs. The processor requires extra machine cycles to execute the JSR/BSR and RTS required each time a subroutine is called. In some cases, these extra machine cycles are more than the routine requires for execution.
Page 153 Technician’s Guide to the 68HC11 Microcontroller * Subroutine to delay 1 s by calling a 10 ms delay 100 times 0140 36 [ 3 ] DLY1S PSHA ;Save A temporarily on stack 0141 86 64 [ 2 ] LDAA #100 ;set loop counter...
Page 154 Subroutines Two-digit HEX to ASCII Temporarily save hex to stack Isolate upper digit Convert digit (HEX2ASC) Store ASCII char code at X Get original value from stack Isolate lower digit Convert digit (HEX2ASC) Store ASCII char code at X+1 Return Figure 6.14 Flowchart of Two-Digit Hex to ASCII Conversion Solution: Each byte of data contains two hex digits.
Page 155 Technician’s Guide to the 68HC11 Microcontroller written to memory. The indexed mode is used to address memory since the effective address is located in the X register. This completes the conversion and storage of the upper digit. Following the conversion of the first digit, the original data is retrieved from the stack so that the lower digit can be converted.
Page 156 Subroutines Jump Table Start Routine Address Address Name Description $FFA3 $E316 WCHEK Test the character code in the A register and set the Z bit if the code is a white space character code (space, tab or comma). $FFA6 $E321 DCHEK Test the character code in the A register and set the Z bit if the code is a delimiter character code (carriage return or white space).
Page 157 Technician’s Guide to the 68HC11 Microcontroller Example 6.7 Problem: Write a program that will input a character from the keyboard, convert the character to uppercase and output the character on the monitor. Use BUFFALO subroutines for all functions. Assemble the program at $0180 in memory.
Page 158 Subroutines Self-Test Questions 6.6 1. What function does the DLY10MS subroutine provide? 2. When would it be useful to execute the INCHAR subroutine? 3. What subroutine would be executed to write a single byte to a location in the EEPROM? Summary A subroutine is a group of code that is modularized for a particular function.
Page 159 Technician’s Guide to the 68HC11 Microcontroller 13. Which registers could be used to pass the starting location of a list of 20 bytes to a subroutine? 14. How is passing by reference similar to the extended addressing mode? 15. Explain balanced use of the stack.
Page 160 Subroutines 3. Which of the following short code segments are examples of balanced use of the stack? a. PSHA b. PSHY c. PSHX d. PSHX PSHX PSHB PULY PSHA PULX PULX PULB PULA 4. Write a subroutine to delay one minute using subroutines. Use PSH and PUL instructions to protect the original data in registers that are used by the subroutine.
Page 161 Technician’s Guide to the 68HC11 Microcontroller 2. The difference between the ASCII codes and the alpha digits is $37, and that between the ASCII codes and the numeric digits is $30. Thus, an extra value of $07 must be added to the codes converted from alpha digits.
Page 162 c h a p t e r Working with an Assembler Workin g with an As sembler Objectives After completing this chapter, you should be able to: ◗ Understand techniques of writing source code that is readable ◗ Utilize assembler directives, labels and directives to enhance source code ◗...
Page 163 Technician’s Guide to the 68HC11 Microcontroller contains addresses and definitions of all the labels. A preliminary set of machine code is also generated. On the second pass, the labels are replaced with the definitions and addresses that the machine code needs to complete the execution of the instructions.
Page 164 Working with an Assembler HERE LDAA #$23 HERE LOOP: DECA LOOP PORTB $1004 MSG1 ‘Waiting’ Figure 7.1 Examples of Labels in Source Code allowed: the period “.”, the dollar sign “$” and the underscore “_”. Labels can be one to eight characters long.
Page 165 Technician’s Guide to the 68HC11 Microcontroller $0100 #$0180 $00DD #$1000 LDAA #$40 STAA $20,X STAA $22,X MAIN MAIN $0180 BCLR $23,X $BF $18,X ADDD #$3E8 $18,X a) Without Labels, Comments and White Space *********************************************************** * HC11 Output Compare Demonstration * Squarewave Generation...
Page 166 Working with an Assembler Self-Test Questions 7.1 1. How can a programmer make the code more readable? 2. What are two different types of comments that can be used in a source file? 3. How can white space be used to make the code more readable? 7.2 Assembler Functions The assembler supports the use of special symbols within the code.
Page 167 Technician’s Guide to the 68HC11 Microcontroller Directive Syntax Function BSZ n Block Store Zeros—Reserves n number of memory bytes and fills them with zero. EQU expression Equate—Causes the value of the expression to replace the label in the listing and machine code files.
Page 168 Working with an Assembler 0001 * program to print message on the monitor ten times 0002 * designed to demonstrate the use of various directives 0003 0004 1004 PORTB $1004 ;assign address $1004 to label PORTB 0005 e2e5 DLY10MS EQU $E2E5 ;assign address $E2E5 to label DLY10MS 0006 ffc7...
Page 169 Technician’s Guide to the 68HC11 Microcontroller 0001 000a 0002 0005 FIVE TEN/2 0003 0001 REMAIN TEN%3 0004 0014 TWENTY TEN*2 0005 001e THIRTY TEN+TWENTY 0006 0007 SEVEN TWENTY/2-3 0007 0008 0073 VALUE1 %01110011 0009 0096 VALUE2 %10010110 0010 0012 VALUE1&VALUE2...
Page 170 Working with an Assembler Each line of the listing file starts with a line number. This number is a decimal number that is sequential throughout the file. The field contains the address in memory that the machine code will start for that instruction. Following the address is the actual machine code.
Page 171 Technician’s Guide to the 68HC11 Microcontroller 2 chars 2 chars 4-8 chars n chars 2 chars Type Length Address Code & Data Checksum Complete S Record Figure 7.9 Format of S Records two-character hex value. The first character of each two-character pair represents the upper four bits, and the second character represents the lower four bits of the machine code byte.
Page 172 Working with an Assembler Summary An assembler is a piece of software that converts mnemonic instructions into operational codes and operands. The source code is the original set of instructions written by the programmer. The use of labels, comments and white space can make the source code files more readable.
Page 173 Technician’s Guide to the 68HC11 Microcontroller Chapter Problems 1. Modify the following example to increase readability without changing the program’s function. MAIN LDAA #$10 AGAIN $E2E5 DECA AGAIN 2. Use directives to define a label for the memory address $1004. Reserve a buffer of eight bytes of memory starting at address $0180 and a message called BOOT that says, “Booting up the computer,”...
Page 174 c h a p t e r Memory Systems Objectives Memory Systems After completing this chapter, you should be able to: ◗ Describe the differences between address and data and explain how they are used ◗ Demonstrate the concepts of address decoding ◗...
Page 175 Technician’s Guide to the 68HC11 Microcontroller Introduction One of the three critical components of a computer system is memory. Without memory, the computer could not be instructed what to do, because the instructions are stored in memory locations. Without memory, the computer system would not have any data to process because the data is also stored in the memory.
Page 176 Memory Systems Tex Nishen 2149 W Dunlap #16 Phoenix, AZ 85021 Figure 8.1 Example of Address In a similar fashion, addresses of computer memory locations also can contain several parts. Often the address parts need to be decoded in order for a particular memory location to be activated.
Page 177 Technician’s Guide to the 68HC11 Microcontroller Figure 8.3 Addressing of Units in a Self-Storage Facility The three-digit number is unique for each unit, but the various parts of each number are not (i.e., the column number is the same for all units in a column). The number for a specific unit within the facility could be referred to by the specific column and unit numbers.
Page 178 Memory Systems $000 $010 $020 $030 $001 $011 $021 $031 $002 $012 $022 $032 $003 $013 $023 $033 $004 $014 $024 $034 $005 $015 $025 $035 $006 $016 $026 $036 $007 $017 $027 $037 $008 $018 $028 $038 $009 $019 $029 $039 $00A...
Page 179 Technician’s Guide to the 68HC11 Microcontroller Part Number RAM EEPROM ROM EPROM Comments MC68HC11A8 —- Entire HC11 family is built around this version of the device MC68HC11A1 —- —- ‘A8 with ROM disabled MC68HC11A0 —- —- —- ‘A8 with ROM & EEPROM disabled...
Page 180 Memory Systems 8.3 RAM There are two primary types of RAM: static and dynamic. All static memory devices use a latch as the storage cell. Each bit of binary data is stored in a single latch. The term static refers to the fact that the state of a latch remains static or unchanged so long as power is applied or the new data is latched into the device.
Page 181 Technician’s Guide to the 68HC11 Microcontroller RAM[3:0] RAM[3:0] (Binary) (Hex) Address Range $0000 - $01FF 0000 $1000 - $11FF 0001 0010 $2000 - $21FF $3000 - $31FF 0011 $4000 - $41FF 0100 0101 $5000 - $51FF $6000 - $61FF 0110...
Page 182 Memory Systems $D000 Register Block $D03F RAM Mapped $D040 $D000–$D1FF Available RAM $D1FF $D200 ROM Mapped $D000–$FFFF Available ROM $FFFF Figure 8.8 Overlapping Memory Map NOTE: The BUFFALO Monitor program requires that the RAM be mapped in the default range of $0000–$01FF. Self-Test Questions 8.3 1.
Page 183 Technician’s Guide to the 68HC11 Microcontroller CONFIG − − − − $103F NOSEC NOCOP ROMON EEON ESET Figure 8.10 EEON Control Bit in the CONFIG Register 8.4 EEPROM The HC11 supports on-chip EEPROM. The HC11E9 contains 512 bytes of EEPROM.
Page 184 Memory Systems PPROG − $103B EVEN BYTE ERASE EELAT EPGM ESET Figure 8.11 PPROG Register 8.11. The ODD and EVEN control bits allow all locations in either the odd or the even half of the EEPROM array to be programmed with the same data simultaneously. They are used only during factory testing of the EEPROM.
Page 185 Technician’s Guide to the 68HC11 Microcontroller programming voltage is not required. This charge pump is activated when EELAT = 1. The charge pump must be activated before the HC11 will allow the programming voltage to be applied to the EEPROM array. The internal circuitry prevents the EPGM bit from being set unless the EELAT bit was previously set.
Page 186 Memory Systems BULKE LDAB #%00000110 ;ERASE=1, EELAT=1 STAB $103B ;Activate BULK erase STAB EEADD ;Write any data to any EEPROM address to initialize erase operation LDAB #%0000111 ;ERASE=1, EELAT=1, EPGM=1 STAB $103B ;turn on programming voltage DLY10MS ;Wait 10 ms $103B ;ERASE=0, EELAT=0, EPGM=0 a) Bulk Erase...
Page 187 Technician’s Guide to the 68HC11 Microcontroller OPTION − $1039 ADPU CSEL IREQ ESET Figure 8.18 Clock Select for EEPROM system. EEPROM Clock If the E clock is below 2 MHz, the 10 ms time delay may need to be increased to assure proper operation during EEPROM writes.
Page 188 Memory Systems versatility. When a single block is not protected, it is available for normal programming and erasure, even though the remaining blocks are protected. NOTE: The BPROT register is one of four protected control registers (BPROT, INIT, OPTION and TMSK2). In the normal processor modes the bits in the BPROT register can be cleared only in the first 64 machine cycles after reset.
Page 189 Technician’s Guide to the 68HC11 Microcontroller CONFIG − − − − $103F NOSEC NOCOP ROMON EEON ESET Figure 8.21 ROMON Control Bit The on-chip ROM can be disabled by a control bit in the CONFIG register, as shown in Figure 8.21. The ROMON control bit is set after reset enabling the on-chip ROM.
Page 190 Memory Systems INIT $103D RAM3 RAM2 RAM1 RAM0 REG3 REG2 REG1 REG0 ESET Figure 8.22 Register Map Position REG[3:0] REG[3:0] Binary Address Range $0000 - $003F 0000 $1000 - $103F 0001 $2000 - $203F 0010 0011 $3000 - $303F $4000 - $403F 0100 0101 $5000 - $503F...
Page 191 Technician’s Guide to the 68HC11 Microcontroller Self-Test Questions 8.6 1. What is the default memory location of the system register block on the EVBU? Can this location be changed? 2. What is the purpose of the system register block? 8.7 Memory Expansion The HC11 has two processor modes that are used for normal operation, single-chip mode and expanded mode.
Page 192 Memory Systems MC68HC11A8 10K TYP PA0/IC3 PA1/IC2 PA2/IC0 − 1 µF 0.01 µF PA3/OC5/OC1 PA4/OC4/OC1 10 µF PA5/OC3/OC1 DATA BUS PA6/OC2/OC1 PA7/PAI/OC1 EXTAL XTAL 8.0 MHz 18 pF 18 pF 74HC373 4.7K RESET RESET MC34064 8K X 8 RAM 4.7K XIRQ 74HC138 4.7K...
Page 193 Technician’s Guide to the 68HC11 Microcontroller Summary Memory is a critical part of all computer systems. All memory requires memory addresses that act as pointers to specific memory locations. The addresses must be decoded so that the individual memory devices can be addresses without the other devices conflicting.
Page 194 Memory Systems 14. Why does the EEPROM require the system clock? 15. Does BUFFALO use the EEPROM? 16. Fully explain what will happen if the control word %00000110 is written to the PPROG register. Section 8.5 17. What type of information is typically loaded into the on-chip ROM? 18.
Page 195 Technician’s Guide to the 68HC11 Microcontroller 2. The HC11K4 contains 768 bytes of RAM. 3. The HC711 versions contain EPROM; the equivalent HC11 versions contain ROM. Section 8.3 1. The default EVBU RAM location is $0000. This location can be changed by writing to the upper four bits of the INIT register.
Page 196 c h a p t e r General Purpose I/O Objectives Gen eral P urp ose I/O After completing this chapter, you should be able to: ◗ Write a code to output data onto the Port B pins ◗ Program the data direction of the Port C bits ◗...
Page 197 Technician’s Guide to the 68HC11 Microcontroller Bidirectional Port Input Pins Output Pins Pins Shared Functions Port A Timer Port B High-Order Address in Expanded Mode Port C Low-Order Address and Data Bus in Expanded Mode Port D SCI and SPI...
Page 198 General Purpose I/O PORTB $1004 IGITAL ESET Figure 9.3 Port B Register (PORTB) Pin Assignments output to the Port B pins following a write to the port B register. A read of the Port B register returns the last data written to the register and has no effect on the register contents or on the data present on the Port B pins.
Page 199 Technician’s Guide to the 68HC11 Microcontroller HC11 Internal Data bus Data Direction Register for Port C DDRC7 DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0 (DDRC - $1007) Port C Register (PORTC - $1003) PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 Port C Pins Figure 9.4 Port C Functional Block Diagram...
Page 200 General Purpose I/O Example 9.2 Problem: Write a program that will program the Port C pins for input, read the data from PORTC and output it to PORTB. Start the program at location $0120. Solution: Since the Port C pins are programmable, a control word must be written to the DDRC register to program the pins.
Page 201 Technician’s Guide to the 68HC11 Microcontroller presented at this point in the text because these instructions are often used in conjunction with the I/O ports. Data Masking All bit-level instructions require a mask to identify the data bits that are to be processed.
Page 202 General Purpose I/O mask mask data data process these bits process these bits − b a) b masked b) upper nibble masked Figure 9.7 Data Masks The HC11 has six instruction mnemonics that are specifically designed for bit-level operations. Two are called bit manipulation instructions because they are designed to change bits within a data word.
Page 203 Technician’s Guide to the 68HC11 Microcontroller Mnemonic Description Function IMM DIR EXT INDX INDY INH (M)+mm ⇒ BSET Set bit(s) in contents of memory (M)•mm ⇒ BCLR Clear bit(s) in contents of memory Figure 9.9 Bit Manipulation Instructions The BCLR instruction will clear the designated data bits within a data word stored at a memory location.
Page 204 General Purpose I/O Mnemonic Description Function IMM DIR EXT INDX INDY INH REL A • (M) BITA Tests bit(s) in B • (M) BITB contents of memory Figure 9.10 Bit-Level Comparison Instructions Bit-Level Comparison There is another set of special compare instructions. They are capable of performing bit-level comparisons.
Page 205 Technician’s Guide to the 68HC11 Microcontroller Mnemonic Description Function IMM DIR EXT INDX INDY INH If (M) • mm = 0 BRSET Branch if bit(s) are then P + ssrr = P If (M) • mm = 0 BRCLR Branch if bit(s) are...
Page 206 General Purpose I/O %11100000 → %00011111 (inverted) Operand $E0 %01100000 → %01100000 Mask AND %00000000 → PC = $01D9 + 4 $01DD rr = $94, sign extend → +$FF94 → DA = PC + rr $0171 b. The first step is to read the operand from memory. In this case, the INDX mode is used to address the operand.
Page 207 Technician’s Guide to the 68HC11 Microcontroller PIOC $1002 STAF STAI CWOM HNDS INVB ESET Figure 9.12 Parallel I/O Control Register (PIOC) HNDS Mode Description Simple Strobed Mode Full-input Handshaking Full-output Handshaking Figure 9.13 Parallel I/O Mode Selection Summary The HC11 can simultaneously send and receive data, because the simple strobed mode send and receive functions are managed by independent hardware.
Page 208 General Purpose I/O PORTCL $1005 PCL7 PCL6 PCL5 PCL4 PCL3 PCL2 PCL1 PCL0 ESET Figure 9.15 Port C Latched (PORTCL) Pin Assignments indicates that a valid edge has been detected on STRA and the data has been latched into the PORTCL register. In simple strobed mode, the STAF bit is cleared by reading the PIOC register followed by a read of the PORTCL register.
Page 209 Technician’s Guide to the 68HC11 Microcontroller Strobe B 8-bit External parallel 8-bit HC11 output on Device parallel External Port C pins input on Device Port C pins Strobe B Strobe A Strobe A a) Full-input Handshaking b) Full-output Handshaking Figure 9.16 Full Handshake Modes...
Page 210 General Purpose I/O activate on a falling edge and cause pulsed handshaking. Then write the code to configure the hardware and cause the input of the data to be stored in location $0000. Solution: Full handshaking is selected by HNDS = 1, input mode by OIN = 0. STRA falling edge is selected by EGA = 0.
Page 211 Technician’s Guide to the 68HC11 Microcontroller Solution: Full handshaking is selected by HNDS = 1, output mode by OIN = 1. STRA falling edge is selected by EGA = 0. PLS will be set to cause pulsed handshaking. The default state of STAI, CWOM and INVB will be used.
Page 212 General Purpose I/O PORTD − − $1008 − − In/Out In/Out In/Out In/Out In/Out In/Out IGITAL ESET DDRD − − $1009 DDRD5 DDRD4 DDRD3 DDRD2 DDRD1 DDRD0 ESET Figure 9.18 PORTD Pin Assignments and Data Direction Control Bits DDRAx bit = 0, the corresponding I/O pin is configured as an input. When the DDRAx bit = 1, the corresponding I/O pin is configured as an output.
Page 213 Technician’s Guide to the 68HC11 Microcontroller Self-Test Questions 9.5 1. How are the PORTA pins configured for general-purpose I/O? 2. When DDRD bits contain logic ’1’, how are the corresponding PDx bits configured? 3. How are the PORTE pins configured for general-purpose I/O? Summary There are five Input/Output (I/O) ports on the HC11.
Page 214 General Purpose I/O 18. What is one advantage of having the STAF bit in the MSB position of the PIOC register? 19. What is the difference between the simple strobed mode and full handshaking? 20. Fully explain the configuration of the handshaking system if the PIOC contains $17.
Page 215 Technician’s Guide to the 68HC11 Microcontroller 3. BRSET and BRCLR will perform branch tests at the bit level. Section 9.4 1. The HC11 supports simple and full handshaking. 2. The PORTCL register is used to latch the input data in simple strobed mode.
Page 216 c h a p t e r HC11 Interrupts and Resets Objectives HC11 I nt errupts an d Reset s After completing this chapter, you should be able to: ◗ Describe the process of servicing an interrupt ◗ Enable and mask interrupts via global and local control bits ◗...
Page 217 Technician’s Guide to the 68HC11 Microcontroller Introduction Resets and interrupts are often discussed together because they share a common function. Each must fetch a vector from memory to initialize the starting point of processing that follows each reset or interrupt.
Page 218 HC11 Interrupts and Resets ESET Figure 10.1 Condition Code Register Control Bits Refer to section 5.5.2 of the Technical Data Manual, as well as to sections 5.2.3, 5.4.1 and 6.3.4.5 of the Reference Manual, for further information regarding the function of the S bit and STOP instruction.
Page 219 Technician’s Guide to the 68HC11 Microcontroller like “hello.” This semiautomatic response to the telephone ring has little variation from day to day and from place to place. The telephone ring demands service, and rarely does it go without being serviced. In the same way, a computer has a fixed response to an interrupt.
Page 220 HC11 Interrupts and Resets Memory Location Register SP-8 SP-7 AccB The order in The order SP-6 AccA which the in which the SP-5 registers are registers are stacked unstacked SP-4 when when RTI is SP-3 interrupt is executed serviced SP-2 SP-1 Figure 10.2 Stacking Order of Registers right where it left off before the interrupt was serviced.
Page 221 Technician’s Guide to the 68HC11 Microcontroller IRQ Entry in the Interrupt Service Routine Vector Table $FFF2 $FFF3 00EE IRQISR Instructions $FFF2 · · · Vector Address = $FFF2 Interrupt Vector = $00EE The location in The address of the first...
Page 222 HC11 Interrupts and Resets Vector Address Interrupt Source FFD6, FFD7 SCI Serial System FFD8, FFD9 SPI Serial Transfer Complete FFDA, FFDB Pulse Accumulator Input Edge FFDC, FFDD Pulse Accumulator Overflow FFDE, FFDF Timer Overflow FFE0, FFE1 Timer Input Capture 4 / Timer Output Compare 5 FFE2, FFE3 Timer Output Compare 4...
Page 223 Technician’s Guide to the 68HC11 Microcontroller $B680 $FF2D CCR $E1 $0041 Address Machine Code Source Code 0002 B7 01 16 STAA $0116 Solution: The first step is to complete the execution of the current instruction. The store instruction will write $92 from AccA to memory location $0116, update the CCR to $E9 because $92 is a negative number and update the PC to $0005 (STAA extended is a 3-byte instruction).
Page 224 HC11 Interrupts and Resets Mnemonic Description Function IMM DIR EXT INDX INDY INH REL Wait for interrupt See Section 10.3 Return from See Section 10.3 ↓ interrupt 0 ⇒ I Clear maskable interrupt mask 1 ⇒ I Set maskable interrupt mask Figure 10.5 Maskable Interrupt Control Instructions Each time an interrupt is executed, the current processor registers are pushed onto the stack prior to loading the program counter with the address of the first instruction...
Page 225 Technician’s Guide to the 68HC11 Microcontroller Local Control Interrupt Source Global Mask Local Enables Register SCI Serial System I bit in CCR RIE, TIE, TCIE & ILIE SCCR2 SPI Serial Transfer Complete I bit in CCR SPIE SPCR Pulse Accumulator Input Edge...
Page 226 HC11 Interrupts and Resets inhibiting interrupts is sometimes called masking, which explains the use of the interrupt class names. Self-Test Questions 10.3 1. What instruction is designed to help speed up interrupt servicing? 2. How can the user disable all maskable interrupts? 3.
Page 227 Technician’s Guide to the 68HC11 Microcontroller OPTION − $1039 ADPU CSEL IRQE ESET Figure 10.7 IRQ Edge Control Bit respectively. IC1I, IC2I and IC3I enable interrupts for the input-capture functions IC1–IC3 respectively. I4/O5I enables the interrupt for the IC4 or the OC5 function depending on which of these two functions is active.
Page 228 HC11 Interrupts and Resets Interrupt Source Priority PSEL[3:0] IRQ (External Pin) 0 1 1 0 Real Time Interrupt (RTI) 0 1 1 1 Timer Input Capture 1 1 0 0 0 Timer Input Capture 2 1 0 0 1 Timer Input Capture 3 1 0 1 0 Timer Output Compare 1 1 0 1 1...
Page 229 Technician’s Guide to the 68HC11 Microcontroller Begin X bit XIRQ PIN Set X bit in CCR in CCR set ? LOW? Fetch Vector $FFF4, FFF5 Highest priority interrupt Fetch Vector EXTERNAL IRQ ? PIN? Fetch Vector STAF AND $FFF2, $FFF3...
Page 230 HC11 Interrupts and Resets Fetch Vector OC5I = 1 ? OC5F = 1 ? $FFE0, $FFE1 Fetch Vector TOI = 1 ? TOF = 1 ? $FFDE, $FFDF Fetch Vector PAOVI = 1 ? PAOVF = 1 ? $FFDC, $FFDD Fetch Vector PAII = 1 ? PAIF = 1 ?
Page 231 Technician’s Guide to the 68HC11 Microcontroller Self-Test Questions 10.4 1. What binary value must be written to the IRQE bit to select level-sensitive operation? 2. What is the default priority of the RTI? 3. If the Timer Input Capture 1 and the Pulse Accumulator Overflow interrupts...
Page 232 HC11 Interrupts and Resets Vector Jump Table Table $FFD6, 7 $00C4 SCI ISR Add $FFD8, 9 $00C7 SPI ISR Add $00CA Interrupt Vector is the PAIE ISR Add PAIE $FFDA, B address of the first $00CD PAO ISR Add $FFDC, D instruction of the interrupt service routine.
Page 233 Technician’s Guide to the 68HC11 Microcontroller are disabled during the initialization. Then the wait message is displayed, and the pro- gram waits for the IRQ interrupt. When the interrupt occurs, the IRQISR is executed. The IRQ message is displayed, and a two-second delay is called. The RTI instruction completes the execution of the ISR, and the control is returned to the main program with the BRA instruction following the WAI instruction.
Page 234 HC11 Interrupts and Resets Self-Test Questions 10.5 1. Where in memory is the Vector Table located? 2. What is effectively the first instruction of every interrupt service routine on the EVBU? 10.6 Nonmaskable Interrupts On the HC11, 6 of the 21 interrupt sources are classified as nonmaskable, as shown in Figure 10.14.
Page 235 Technician’s Guide to the 68HC11 Microcontroller NOTE: The X bit is set after reset disabling the XIRQ interrupt source. The user can use a TAP instruction to clear this bit to enable this nonmaskable interrupt source. Once XIRQ has been enabled, it cannot be disabled, except via system reset.
Page 236 HC11 Interrupts and Resets CONFIG − − − − $103F NOSEC NOCOP ROMON EEON ESET Figure 10.15 COP Local Control Bit software is responsible for keeping a free-running clock from timing out. If the clock times out, it is an indication that the software is no longer executing properly. This condition causes a system reset.
Page 237 Technician’s Guide to the 68HC11 Microcontroller Interrupt Source Priority Power-On Reset (POR) Clock Monitor Fail COP Failure XIRQ (External Pin) Illegal Opcode Fetch Software Interrupt (SWI) Figure 10.17 Nonmaskable Interrupt Priority Nonmaskable Interrupt Priority The nonmaskable interrupt sources are prioritized as shown in Figure 10.17. Unlike the maskable interrupt sources, nonmaskable sources cannot be reprioritized.
Page 238 HC11 Interrupts and Resets 10.7 Resets The reset feature of a microcomputing system is used to set initial conditions within the system and begin executing instructions from a predetermined address. The reset condition can be caused by an external or an internal stimulus. External stimuli are classified as external resets, and internal stimuli are classified as internal resets.
Page 239 Technician’s Guide to the 68HC11 Microcontroller an input-only pin on a processor. An active state on this pin causes the process to enter a reset sequence. The HC11 RESET pin functions as an external reset input as well as an internal reset output.
Page 240 HC11 Interrupts and Resets OPTION − $1039 ADPU CSEL IRQE ESET Control Bits Scale Value Time-out Rate (E/x) Time-out Rate (ms) 16.384 65.536 262.144 1.049 s Figure 10.19 COP Time-Out Rate Control Bits Since the COP timer is based on the system clock, the COP watchdog cannot detect errors that cause the system clock to stop.
Page 241 Technician’s Guide to the 68HC11 Microcontroller 10.8 Servicing a Reset Interrupt There are four sources of a reset condition: the power-on condition, an active low state on the RESET pin, a COP watchdog failure, and a clock monitor failure. Each of these reset sources causes a set process to be followed. The steps are as follows: 1.
Page 242 HC11 Interrupts and Resets ◗ Timer Output Compare registers are set to $FFFF. ◗ OC5 is selected, and IC4 is disabled. ◗ All output-compare, input-capture and pulse accumulator functions are disabled. ◗ Real-Time interrupt rate is set to the fastest rate (E/2 ◗...
Page 243 Technician’s Guide to the 68HC11 Microcontroller Summary Interrupts and resets are often discussed together because they share a common function. Each must fetch a vector from memory to initialize the starting point of software to complete the servicing of the interrupt or reset.
Page 244 HC11 Interrupts and Resets Section 10.6 14. For what purpose is the Illegal Opcode interrupt used? 15. Can the nonmaskable interrupts be reprioritized? 16. What is the relative priority of the SWI in reference to the other nonmaskable interrupts? Section 10.7 17.
Page 245 Technician’s Guide to the 68HC11 Microcontroller 3. Timer Overflow Interrupt can be locally controlled by the TOI in the TMSK2 register. Section 10.4 1. IRQE = 0 to select level-sensitive operation. 2. RTI has the second-highest priority of the nonmaskable interrupts.
Page 246 c h a p t e r Analog Capture—Port E Objectives Analo g Capture—Port E After completing this chapter, you should be able to: ◗ Explain the theoretical process of analog-to-digital conversion ◗ Calculate Range, Step Voltage and Resolution ◗ Predict the digital code generated from any analog input ◗...
Page 247 Technician’s Guide to the 68HC11 Microcontroller binary-formatted data, most measurable data, like current, voltage, temperature or speed, is analog by nature. This data is not formatted in a machine-readable binary format; thus it is necessary to convert the analog data to a digital format for processing.
Page 248 Analog Capture—Port E Analog physical quantity: i.e, lumens, PSI, degrees, pounds Digital quantity Light Pressure Sensor Scaling Computer Hardware Converter Temperature Weight Analog voltage quantity Figure 11.1 Analog Data Acquisition Process sensor is connected to some scaling hardware. The job of the scaling hardware is to amplify and shift the electrical signal so that it matches the input requirements of the analog-to-digital converter.
Page 249 Technician’s Guide to the 68HC11 Microcontroller Maximum Reference Voltage +15 V cannot be greater than the sensor maximum High Reference Voltage (V +5 V Range Low Reference Voltage (V Maximum +0 V Range can not be less than the sensor minimum...
Page 250 Analog Capture—Port E Number of Steps = 2 Equation 11.2 where n = the number of bits in the resulting digital code. NOTE: Because of the view that zero should not be assigned to a step value, some n – 1 texts and A/D circuitry calculate the number of steps as 2 .
Page 251 Technician’s Guide to the 68HC11 Microcontroller which occupies the portion of the range from 19.53 mV up to 39.06 mV. This process continues through all 256 steps until the entire range is assigned steps and digital codes. The top step, digital code $FF, will be equal to the range from 4.980 V (255 * V...
Page 252 Analog Capture—Port E in volts. As the step voltage decreases in reference to the range, the resolution of the system increases. Resolution is also calculated as a percentage of the total range. Percent resolution is calculated as follows: 100% 100% Equation 11.5 Resolution (%) = Number of steps...
Page 253 Technician’s Guide to the 68HC11 Microcontroller ADR1 Analog ($1031) Input Converter Multi- plexer ADR2 ($1032) Port E Pins ADCTL ADR3 ($1030) ($1033) Port E OPTION Register ADR4 ($1039) ($100A) ($1034) Conversion Control Result Register Figure 11.5 A/D Converter Hardware Block Diagram the input pins are named PE7 through PE0.
Page 254 Analog Capture—Port E Analog-to-Digital Converter The analog channel selected by the input multiplexer is converted to digital in this block. It contains a capacitive array digital-to-analog converter (DAC), a comparator and a successive approximation register (SAR). The DAC array acts as a sample and hold circuit during the conversion sequence, and it provides a comparison voltage to the comparator during the successive approximation conversion process.
Page 255 Technician’s Guide to the 68HC11 Microcontroller ADCTL − $1030 SCAN MULT ESET Figure 11.8 ADCTL Register Control Bit and Status Flag The ADCTL register contains one status flag CCF (b ), one unused bit (b ), and six control bits (b –b...
Page 256 Analog Capture—Port E Channel Select Channel Control Bits Channel Number CD CC CB CA Signal Figure 11.10 Single-Channel Selection and Assignments (adapted with permission from Motorola) Channels 9–16 are used for internal testing and reference and are not used during normal operation.
Page 257 Technician’s Guide to the 68HC11 Microcontroller and V is the high reference voltage or the top end of the reference range. is the low reference voltage or the bottom end of the reference range. must be greater than or equal to V (processor reference voltage - ground).
Page 258 Analog Capture—Port E Example 11.1 Problem: What has to be written to the ADCTL register to start a single scan of channel 7 and then wait for the conversion to complete? Solution: The first step is to build a control word for the OPTION register. On the EVBU, BUFFALO activates the A/D system by setting the ADPU bit in the OPTION register;...
Page 259 Technician’s Guide to the 68HC11 Microcontroller LDAA #$10 ;SCAN = 0, MULT = 1, CD:CC:CB:CA = 0000 STAA $1030 ;Start conversion sequence WAIT2 LDAA $1030 ;Test for CCF = 1 WAIT2 If CCF = 0 read ADCTL again Conversion Sequence and Timing The A/D function on the HC11 is configured always to perform a set of four conversions.
Page 260 Analog Capture—Port E Figure 11.12 HC11 Conversion Sequence Timing (courtesy of Motorola) Self-Test Questions 11.3 1. How does the user start a conversion sequence? 2. When CSEL = 0, how many E clock cycles are required to convert a single channel? 3.
Page 261 Technician’s Guide to the 68HC11 Microcontroller Thermometer LOOP Start a single scan of channel 8 POLL CCF = 1? Get sample from ADRx Scale to 19.5 mV/step Calculate 100's digit Calculate 10's digit Calculate 1's digit Output three digit temperature Delay 1 second Figure 11.14 Flowchart of Thermometer Example...
Page 262 Analog Capture—Port E *********************************************************** * HC11 Digital Thermometer Example * This program outputs to the monitor the decimal * temperature in degrees Fahrenheit using an LM34 * temperature sensor and PORTE *********************************************************** ADCTL $1030 Define labels to make code ADR1 $1031 more readable.
Page 263 Technician’s Guide to the 68HC11 Microcontroller were presented. The range is the difference between the high and low reference voltages. A step is a small section of the range that has a unique name or a code assigned to it. The resolution is the ratio of the “size of the step” to the “size of the range.” It is normally expressed in percentage.
Page 264 Analog Capture—Port E Section 11.3 21. What hex value needs to be loaded into the lower nibble of the ADCTL to select channel 5 for conversion? 22. Fully describe what will be accomplished if $10 is written to the ADCTL. 23.
Page 265 Technician’s Guide to the 68HC11 Microcontroller Section 11.2 1. The PORTE pins are configured for digital input after reset. 2. The HC11 can support 8 independent analog input channels. 3. The HC11 is an 8-bit conversion system. 4. The HC11 is configured to always convert four channels before the CCF is set.
Page 266 c h a p t e r Timed Events—Port A Objectives Timed Even ts—P ort A After completing this chapter, you should be able to: ◗ Define the concept of a timed event ◗ Describe the pin assignments of the Port A timing system ◗...
Page 267 Technician’s Guide to the 68HC11 Microcontroller Introduction Port A is a general-purpose I/O port that can also be configured for a variety of timer functions. This chapter will present some theory behind the concept of timed events and then address the five major functions performed within the HC11 timing system: 1.
Page 268 Timed Events—Port A 12.1 Theory of Timed Events All microcomputing systems have a need for functions to occur at specific points in time. For example, the digital clock on the PC is a timer system that increments the seconds, minutes and hours. A timed event in this case occurs on a one-second interval. This event causes the clock to count.
Page 269 Technician’s Guide to the 68HC11 Microcontroller Figure 12.2 Timer Clock Divider Chains ( adapted with permission from Motorola ) 12.2 Main Timer Functions The HC11 timing system is comprised of five major timing chains. Three of these chains are tied to features of Port A, and the other two chains are tied to features of Port D, which are discussed in the next chapter.
Page 270 Timed Events—Port A TCNT $100E (HI) $100F (LO) ESET Figure 12.3 TCNT Register Layout the sequence over again. Each time the register rolls over, the timer overflow flag (TOF) is set in the Timer Interrrupt Flag Register 2 (TFLG2). TOF indicates that the TCNT register has rolled over;...
Page 271 Technician’s Guide to the 68HC11 Microcontroller Control Bits Scale Timer Count Clock Overflow Value (E/x) Period (ns) Period (ms) 32.768 2,000 131.072 4,000 262.144 E/16 8,000 524.288 Figure 12.5 TCNT Register Timing for 2 MHz E clock Clearing Timer Flags The flag bits, within the Port A timing system, are cleared by writing a 1 to the respective bit.
Page 272 Timed Events—Port A Example 12.2 Problem: Assume that the TOF and the Pulse Accumulator Overflow (PAOVF) flags are set in the TFLG2 register. Clear TOF in the TFLG2 register using only a BCLR instruction. This operation should have no effect on the other bits in TFLG2. Solution: The register data is $A0 (TOF and PAOVF set).
Page 273 Technician’s Guide to the 68HC11 Microcontroller the index register must be loaded with the proper address to point to the register space. Direct addressing mode sequences are not shown since the default register space on the EVBU is located from $1000 to $103F, which is outside the direct addressing modes’...
Page 274 Timed Events—Port A Self-Test Questions 12.2 1. How many bits are in the TCNT register? 2. Can the TCNT register be preloaded to some value by the user? 3. What is the address of the TFLG2 register? 4. How many flag bits are there in the timer system? 5.
Page 275 Technician’s Guide to the 68HC11 Microcontroller Uniqueness of the IC4 Function The IC4 function shares hardware with the Output-Capture 5 (OC5) function and therefore is different from the IC1, IC2 and IC3 functions. Special control bits that reside in the Pulse Accumulator Control (PACTL) register must be manipulated to assure proper operation of this function.
Page 276 Timed Events—Port A The new value will NOT be lost, but will be temporarily stored until the end of the read cycle, then be written to the corresponding register. If, however, two single-byte read instructions are used, that is, Load A (LDAA) followed by Load B (LDAB), the hardware write to the TICx register will be inhibited only for a single bus cycle.
Page 277 Technician’s Guide to the 68HC11 Microcontroller PACTL $1026 DDRA7 PAEN PAMOD PEDGE DDRA3 I4/O5 RTR1 RTR0 ESET Figure 12.11 Special Control Bits for the IC4 Function Example 12.1 Problem: What has to be written to the TCTL2 register to activate the IC2 function to capture on any edge? Solution: A command word must be built and then written to TCTL2.
Page 278 Timed Events—Port A interrupts. They allow each input-capture function to be configured for polled mode or for interrupt-driven operation but do not affect the setting or clearing of the corresponding flag bits in the TFLG1 register. If the interrupt enable bit is set, the corresponding interrupt request will be made each time the status flag is set.
Page 279 Technician’s Guide to the 68HC11 Microcontroller Example 12.2 Problem: Using IC1 to capture input edges, write a program that will measure and store the period of an input waveform. Solution: Figure 12.14 shows a flowchart that will measure and store the period of an input waveform.
Page 280 Timed Events—Port A $0000 EDGE1 ;temp storage of time of edge1 PERIOD ;storage of calculated period $0120 ;Start program at $0120 #$1000 ;Load register base address in Index Y LDAA #$10 ;detect rising edge of IC1 input STAA TCTL2,Y AGAIN BCLR TFLG1,Y $FB ;clear IC1 flag...
Page 281 Technician’s Guide to the 68HC11 Microcontroller OC3, OC4 and OC5. Each of these functions is implemented with three functional hardware blocks: an output-compare register, a dedicated 16-bit comparator and interrupt generation logic, as shown in Figure 12.16. The comparators check the value in the TCNT register against the 16-bit compare registers (TOCx and TI4/O5) during each timer count.
Page 282 Timed Events—Port A register must be manipulated to assure proper operation of this function. In addition, the OC5 function does not have a dedicated TOCx register (output-compare register). It shares a 16-bit register with the IC4 function. This register is called TI4/O5. Specific differences relevant to the OC5 function are mentioned throughout the next sections as each feature of the output compare system is described.
Page 283 Technician’s Guide to the 68HC11 Microcontroller inhibits the output-compare function for only one bus cycle. Before the second half of the register can be written with a single-byte write, the compare operation resumes. Erroneous compares may take place during the two single-byte writes.
Page 284 Timed Events—Port A PACTL $1026 DDRA7 PAEN PAMOD PEDGE DDRA3 I4/O5 RTR1 RTR0 ESET Figure 12.19 Special Control Bits for the OC5 Function Example 12.4 Problem: What has to be written to the TCTL1 register to activate the OC3 function to cause the output signal to toggle on a valid compare? Solution: A command word must be built and then written to TCTL1.
Page 285 Technician’s Guide to the 68HC11 Microcontroller mode or for interrupt-driven operation but do not affect the setting or clearing of the corresponding flag bits in the TFLG1 register. If the interrupt enable bit is set, the corresponding interrupt request will be made each time the status flag is set.
Page 286 Timed Events—Port A Two separate output-compare functions can also control a single pin. OC1 can be used in conjunction with any one or all of the other output-compare functions. This allows both edges of an output signal to be programmed at the same time, greatly reducing the necessary software overhead.
Page 287 Technician’s Guide to the 68HC11 Microcontroller One transition Two transitions per cycle per ½ Cycle If ƒ=1 kHz, then the period is equal to 1/ƒ=(1/1 kHz) = 1 ms Since there are two transitions per cycle, then the transitions must happen every 500 µs to produce a 50% duty cycle 1 kHz waveform.
Page 288 Timed Events—Port A Begin Activate OC2 to toggle each half cycle CLRFLAG Clear OC2 flag WAITFLG OC2F = 1? Get current event time Calculate next event time Store event time in TOC2 for next event Figure 12.24 Flowchart for Square Wave Creation *********************************************************** * This program generates a 1KHz squarewave on OC2 (pin 28) ***********************************************************...
Page 289 Technician’s Guide to the 68HC11 Microcontroller Edge Protection Port A Pins Logic PACNT PACTL Pulse Accumulator Register Summary Interrupt Generation PACNT Pulse Accumulator Counter Logic Register ($1027) PACTL Pulse Accumulator Control Register ($1026) TFLG2 TFLG2 Timer Interrupt Flag Register 2 ($1025)
Page 290 Timed Events—Port A PACTL $1026 DDRA7 PAEN PAMOD PEDGE DDRA3 I4/O5 RTR1 RTR0 ESET PAMOD PEDGE MODE Action Event PA counter incremented by falling edge on PAI Event PA counter incremented by rising edge on PAI Gated 0 on PAI inhibits counting of E/64 Gated 1 on PAI inhibits counting on E/64 Figure 12.28 Pulse Accumulator Control Bits accumulator system.
Page 291 Technician’s Guide to the 68HC11 Microcontroller E/64 Mode PAMOD PEDGE Event Gated Count in PACNT Register Figure 12.29 Pulse Accumulator Mode Examples Figure 12.29 illustrates how the pulse accumulator will count input events in event mode versus how the pulse accumulator will count each E/64 during the active input on PAI while using gated mode.
Page 292 5. What is the maximum count of the PACNT register? 12.6 Real-Time Interrupts The real-time interrupt (RTI) function on the 68HC11 can be used to generate events at a fixed periodic rate. Unlike the other Port A features, the RTI does not have to be activated.
Page 293 Technician’s Guide to the 68HC11 Microcontroller TFLG2 − − − − $1025 RTIF PAOVF PAIF ESET TMSK2 − − $1024 RTII PAOVI PAII ESET Figure 12.31 Real-Time Interrupt Status Flag Bit PACTL DDRAT PAEN PAMOD PEDGE DDRA3 I4/O5 RTR1 RTR0...
Page 294 Timed Events—Port A Summary Port A is a general purpose I/O that can also be configured for a variety of timer functions. This chapter presented the theory of timed events as well as explanation and examples of the five major functions performed within the HC11 timing system.
Page 295 Technician’s Guide to the 68HC11 Microcontroller 12. Why is it important for the user to clear the flag bits while servicing an interrupt? Section 12.3 13. How many input-capture functions are available on the HC11E9? 14. What value is in the TCTL2 register after reset? 15.
Page 296 Timed Events—Port A 39. What is the value loaded into the PAMOD and PEDGE bits of the PACTL register so that a rising edge on PAI increments the count? 40. What is the value loaded into the PAMOD and PEDGE bits of the PACTL register so that a high state on PAI inhibits the count? 41.
Page 297 Technician’s Guide to the 68HC11 Microcontroller Section 12.3 1. The time at which the event occurred where the time is the relative time contained in the TCNT register. 2. Input-capture register, input edge detection logic, and interrupt generation logic. 3. TMSK1...
Page 298 This chapter will discuss two types of serial communications interfaces: asynchronous and synchronous. Both of these interfaces are part of the PORTD subsystem in the 68HC11. The asynchronous interface is implemented with the serial communications interface (SCI) hardware, and the synchronous interface is implemented with the serial peripheral interface (SPI) hardware.
Page 299 Technician’s Guide to the 68HC11 Microcontroller 13.1 Theory of Serial Communications In chapter 1, it was shown that data is stored on a computer in multibit words. These words are usually 8 bits wide and are called bytes. This data moves around inside the computer from registers to memory and the various processor components via the data bus.
Page 300 Serial Communication—Port D Serial data from transmission medium Parallel data to the computer Figure 13.2 Serial to Parallel Conversion When the data is received from the serial medium, the control bits are no longer needed and are stripped from the stream. This leaves only the original data, which is converted back to the parallel words.
Page 301 Technician’s Guide to the 68HC11 Microcontroller Start bit Optional first (low) parity bit Idle line state Stop bits (high) (high) Direction of transmission Figure 13.3 Asynchronous Serial Character Format Synchronous Communications Synchronous communications is a method of transmitting serial data by using a synchronizing clock.
Page 302 Serial Communication—Port D Port D − − In/Out In/Out In/Out In/Out In/Out In/Out IGITAL − − SCI F UNCTION Figure 13.4 Port D Pin Designations for SCI SCI Timing Control All timing for the SCI system is derived from the HC11 bus clock. The bus clock operates at the same frequency as the E clock, but at a different phase.
Page 303 Technician’s Guide to the 68HC11 Microcontroller number of cycles. The highest baud rate is approximately 41 kHz and 9600 Hz respectively. The output of the prescaler is sent on to the baud-rate selector. Three bits are used to select the final baud rate which are called the SCI Baud Rate Selects (SCR2, SCR1 and SCR0).
Page 304 Serial Communication—Port D Example 13.1 Problem: Build a command word that will configure the SCI for 4800 BAUD. Solution: The SCP1 and SCP0 bits should be set to %11 to select the maximum BAUD rate to be 9600; then the SCR2–SCR0 bits should be set to %001 to select 4800 BAUD.
Page 305 Technician’s Guide to the 68HC11 Microcontroller The process of transmitting characters is controlled by the bits in two SCI Control Regis- ters (SCCR1 and SCCR2). The SCCR1 register contains two bits that directly control the SCI transmit function, as shown in Figure 13.8b. The SCI allows for data transfers of 8 or 9 bits.
Page 306 Serial Communication—Port D and stop bits. Logic ones create the idle line condition necessary for receive hardware to recognize the first character of a transmission. Transmission continues with subsequent writes to the SCDR. The last bit in the SCCR2 register that is relevant to the transmit operation is called Send Break (SBK).
Page 307 Technician’s Guide to the 68HC11 Microcontroller 0009 002f SCDR 0010 0011 0100 $0100 0012 0100 ce 10 00 #REGBASE 0013 0103 18 ce 00 00 #MSG 0014 0015 0107 86 18 LDAA #%0011000 ;Set BAUD rate for 9600 0016 0109 a7 2b...
Page 308 Serial Communication—Port D SCDR 16X Baud Rate Clock ÷ 16 (Rx Buffer) Rx Shift Register Data ( 8 ) 7 Recovery Stop Bit Start Bit DDRD0 Receiver Control Logic Noise Flag SCCR1 SCCR2 SCSR SCI Interrupt Request Figure 13.9 SCI Receiver Functional Block Diagram needs to be read to avoid an overrun error.
Page 309 Technician’s Guide to the 68HC11 Microcontroller The Receive Enable (RE) bit of the SCCR2 register is used to enable the SCI receive function. When RE =1, the receiver begins waiting for character data. When RC = 0, the SCI receiver is disabled and the RDRF, IDLE, OR, NF and FE receive status flags cannot be changed.
Page 310 Serial Communication—Port D The Noise Flag (NF) indicates that the data recovery logic detected noise during the reception of the character. Noise is indicated if three samples taken during the center of the data bit or stop are not the same. The noise test for the start bit involves three bits in the middle of the bit and four samples at the start of the bit.
Page 311 Technician’s Guide to the 68HC11 Microcontroller 0010 0011 0120 $0120 0012 0120 ce 10 00 #REGBASE 0013 0123 18 ce 01 e0 #BUFFER 0014 0015 0127 86 18 LDAA #%0011000 ;Set BAUD rate for 9600 0016 0129 a7 2b STAA...
Page 312 Serial Communication—Port D SPDR Port D Pins Shift Register Read Data Buffer MISO MOSI SPI Control Logic CPOL SPI Interrupt Request SPCR CPHA Clock Generator SPR1 DDRD SPR0 SPSR Figure 13.11 SPI Functional Block Diagram The block diagram of the SPI system is shown in Figure 13.11. The SPI has the ability to transmit and receive data simultaneously.
Page 313 Technician’s Guide to the 68HC11 Microcontroller Port D Pins − − MOSI MISO ESET DDRD − − $1009 DDRD5 DDRD4 DDRD3 DDRD2 DDRD1 DDRD0 ESET Figure 13.12 Relationship of SPI Pins to Bits in the DDRD Register ⁄ the data input pin on a slave device. Data from the master is placed on the MOSI pin clock cycle prior to the clock edge used by the slave device to latch the data.
Page 314 Serial Communication—Port D SPCR $1028 SPIE DWOM MSTR CPOL CPHA SPR1 SPR0 ESET a) SPI Control Register Layout E Clock SPR1 SPR0 Divisor E/x Transfer Bit Rate 1.0 MHz 500 kHz E/16 125 kHz E/32 62.5 kHz b) SPI Clock Rates for 2 MHz E Clock Figure 13.14 SPI Control (SPE) bit is the master enable for the SPI system.
Page 315 Technician’s Guide to the 68HC11 Microcontroller Figure 13.15 SPI Transfer Timing Formats SPSR − − − − − $1029 SPIF WCOL MODF ESET Figure 13.16 SPI Status Register Layout Self-Test Questions 13.3 1. What are the two communications functions available in the Port D communica- tions system? 2.
Page 316 Serial Communication—Port D Chapter Questions Section 13.1 1. Define serial data. 2. What was a reason that RS-232 was first developed? 3. In what order are the data bits transferred within a character in an asynchro- nous system? 4. What is the purpose of the start bit in an asynchronous system? 5.
Page 317 Technician’s Guide to the 68HC11 Microcontroller 2. Calculate the total amount of transmit time for 10 characters in the SCI system with the following format: 8-bit data, 1 start bit, 1 stop bit, no parity. Use 4800 BAUD. Recalculate for 300 BAUD.
Page 318 c h a p t e r C Programming Using the HC11 C Programming U sin g th e HC11 Objectives After completing this chapter, you should be able to: ◗ Understand the basic concepts of programming in a higher-level lan- guage ◗...
Page 319 Technician’s Guide to the 68HC11 Microcontroller rather a brief overview of some common features and their direct correlation to blocks of assembly code. The C language was developed by engineers at Bell Labs during the 1970s as a tool to develop the UNIX operating system.
Page 320 C Programming Using the HC11 prin tf(“This would not work because the keyword printf is split”); Figure 14.3 Improper Use of White Space x = 120; y = 64; z = x / y; Figure 14.4 Use of the Braces to Form a Complex Statement main () { statements;...
Page 321 Technician’s Guide to the 68HC11 Microcontroller char a, b; /*declares two single byte variables a and b. */ Figure 14.6 Char Data Type int x; /*declares a 16 bit signed variable named x. unsigned int y; /*declares a 16 bit unsigned variable named y. */ Figure 14.7 Int Data Type...
Page 322 C Programming Using the HC11 14.3 Operators Data of any type can be added, subtracted, multiplied or divided. Each arithmetic function has a defined operator, as shown in Figure 14.9. Each operator is used to indicate the respective arithmetic operation. Each arithmetic operator requires two operands;...
Page 323 Technician’s Guide to the 68HC11 Microcontroller Operator Associativity Unary - right to left (, ) left to right *, /, % left to right +, - left to right Figure 14.12 Order of Precedence of Operators followed by the operations outside the parentheses. Multiple sets of parentheses are evaluated in a left-to-right fashion.
Page 324 C Programming Using the HC11 year = 1988; sum = 6 + 5 + 18; rate = prime; inches = 12 * feet; classAvg = (grade1 + grade2 + grade3) / 3.0 * factor; Figure 14.13 Examples of the Use of the Assignment Operator sum = sum + newvalue;...
Page 325 Technician’s Guide to the 68HC11 Microcontroller Grade1, Grade2, /* variables for grades */ Grade3; Average; /* variable for average */ Grade1 = 85; Grade2 = 93; Grade3 = 98; Average = (Grade1 + Grade2 + Grade3) / 3; Self-Test Questions 14.4 1.
Page 326 C Programming Using the HC11 for (initializing list; expression; altering list) statement; Figure 14.16 General Syntax of the For Statement Example 14.4 Problem: Write a short C code segment using the if-then-else structure that will check to see if x is greater than zero. If x is greater than zero, then assign x plus 1 to y, else assign zero to y.
Page 327 Technician’s Guide to the 68HC11 Microcontroller Self-Test Questions 14.5 1. For what purpose is the if-then structure used? 2. What does the keyword “else” provide to the if-then structure? 3. How is the “for” statement similar to the if-then structure? 14.6 Subroutines...
Page 328 C Programming Using the HC11 code. The purpose in these examples is to provide insight into the process the compiler goes through of translating the high-level commands (statements) into low-level mnemonic instructions. The function of these programs is somewhat trivial; however, they do serve to illustrate the relationship of higher-level “C” code to the lower-level assembly code.
Page 329 Technician’s Guide to the 68HC11 Microcontroller Example 14.7 Problem: Write a C program to perform a 16-bit division of two integers. Solution: This example defines three integer (2 byte) variables x, y, and z. It assigns the value 4 to x and the value 2 to y. It then divides x by y and assigns the result to the variable z.
Page 330 C Programming Using the HC11 char x, y, z; main(){ x = 2; y = -4; addemup(); addemup() z = x + y; 0001 char x, y, z; 0002 0000 $0000 0003 0004 0000 0005 0006 0001 0007 0008 0002 0009 0010 0100...
Page 331 Technician’s Guide to the 68HC11 Microcontroller char x, y, z; main() x = 5; y = 6; if(x == y) z = x; else z = y; 0001 0000 $0000 0002 0003 0000 0004 0005 0001 0006 0007 0002 0008...
Page 332 C Programming Using the HC11 char x, i; main() x = 0; for(i = 5; i > 0; i = i - 1) x = x + 1; 0001 char x, i; 0002 0003 0000 $0000 0004 0005 0000 0006 0007 0001 0008...
Page 333 Technician’s Guide to the 68HC11 Microcontroller 2. How are statements grouped together into a complex statement? 3. What is the format of the main function of each C program? Section 14.2 4. What is the maximum number that can be stored using an unsigned int? 5.
Page 334 C Programming Using the HC11 (18 – 5) / (–37) + 2 * 64 4. Evaluate the following expression using the proper order of precedence: (524 – 5 * 88) % 3 + (–2) * (64 / 8 + 22) Answers to Self-Test Questions Section 14.1 1.
Page 336 a p p e n d i x Computer Mathematics Computer Mathematics Introduction All computer systems process data. Data represents information in various forms. However, all data processed by a computer must be in a binary form. For example, characters are stored in computer memories and processed by computer hardware. Most character-based data is stored as binary codes;...
Page 337 Technician’s Guide to the 68HC11 Microcontroller −1 −2 −3 − n radix point Figure A.1 Basic Layout of a Number System weight assigned to each position is equal to a multiple of the base. The digit to the immediate left of the radix (decimal point in decimal, binary point in binary, etc.) is always the base raised to the zero power (base ).
Page 338 Computer Mathematics Ascending order Descending order Ascending order Descending order Figure A.3 Symbols of Number Systems: (a) Binary and (b) Hexadecimal. The distance between symbols, in binary and hex, is always equal to a single unit, and the patterns repeat forever in a cyclical fashion. The zero (0) symbol follows the F symbol in ascending order in hex.
Page 339 Technician’s Guide to the 68HC11 Microcontroller Conversions Between Number Systems Since computers are built from thousands of switches, they are inherently binary. Humans have difficulty reading and writing binary because of the number of digits required for large numbers. Therefore, hex is used regularly to display data used by the computer.
Page 340 Computer Mathematics Position, starting from right Weights of digits as a function of digit position digits Base indicator digit weight 7 × 10 = 70 5 × total value in decimal Figure A.5 Weighting of Digits in a Multidigit Decimal Number The number 75 is represented in binary as %01001011.
Page 341 Technician’s Guide to the 68HC11 Microcontroller Positions Weights Motorola base 16 convention Value in decimal. $B = 11 11 × 1 = 11 4 × 16 = 64 Figure A.7 Conversion from Hex to Decimal Using the Weight and Add Method...
Page 342 Computer Mathematics Base of target number system Source number Remainders from Quotients each division of each division Converted number % 1 1 1 0 1 0 Figure A.9 Conversion from Decimal to Binary Using the Divide-by-Base Method Source number Remainders from each division converted to target number system Quotients of each...
Page 343 Technician’s Guide to the 68HC11 Microcontroller 0101 0011 1001 0110 0010 1101 1011 0111 0000 1111 1010 1000 Figure A.11 Hex ↔ Binary Conversions binary digits in sets of four, starting with the least significant digit. The conversion of a hex number to binary requires that each hex digit be expanded to its 4-bit binary equivalent.
Page 344 Computer Mathematics A.2 Arithmetic Humans typically can perform simple arithmetic calculations in their heads because they have memorized the addition operations through 10 or 12. They don’t have to think about how to add, they just recall from memory the result of a particular problem. There is a limit to what they can do off the top of their heads, because there is a limit to what has been committed to memory.
Page 345 Technician’s Guide to the 68HC11 Microcontroller Carry Carry Result Problem starts Result = 4 with a carry here. with 6 or 14. symbol. (a) single-column number line (b) single-column addition Carry Carry Second column Result of 1+9=0 Result of Problem...
Page 346 Computer Mathematics = 0011 = 0100 Figure A.14 Conversion of Decimal Numbers to 4-Bit Binary First Second Carry Figure A.15 2-Bit Binary Combinations carry from 0 0 1 previous column 0 1 1 1 0 1 result (b) 8-bit binary (a) 4-bit binary Figure A.16 Binary Additions The number line is not very helpful with binary addition because there are only two...
Page 347 Technician’s Guide to the 68HC11 Microcontroller B C D Start Result of with 6 6+8 = E. symbol. carry 1 A B C Result of Start with D+C=9. D symbol. Figure A.17 Single-Digit Hex Addition The number-line concepts and rules from the presentation on decimal addition now directly apply.
Page 348 Computer Mathematics Third column 1 + 3 = 4 1 + 3 + 7 = B addition starts with carry from previous column. (c) last column on left This carry is This carry is equal to 256 equal to 16 (d) multicolumn addition Figure A.18 Multicolumn Hex Addition with Carry Using a Number Line ( continued ) A.3 Signed Numbers (2’s Complement Number System)
Page 349 Technician’s Guide to the 68HC11 Microcontroller decimal. In binary, the “1” symbol indicates negative and the “0” symbol indicates positive. As has been discussed, there cannot be empty bits in a binary number; therefore, all signed numbers have a 1 or a 0 in the most significant bit position to indicate negative or positive.
Page 350 Computer Mathematics 0 1 0 0 0 1 1 1 1 0 1 1 1 0 0 0 1's complement add 1 0 0 0 0 0 1 0 1 −71 1 0 1 1 1 0 0 1 1 1 1 1 1 0 1 0 1's complement 0 1 0 0...
Page 351 Technician’s Guide to the 68HC11 Microcontroller 2’s Complement 2’s Complement Decimal Form Decimal Form 00000000 11111111 00000001 11111110 00000010 11111101 00100110 11011001 01001011 10101001 01101110 -100 10011100 01111000 -120 10001000 01111110 -127 10000001 01111111 -128 10000000 Figure A.24 2’s Complement Decimal Equivalents requires a single step.
Page 352 Computer Mathematics 2 digit 8-bit Binary unsigned signed 2's complement form decimal decimal 0 0 0 0 0 1 1 1 − 1 1 1 1 1 0 1 1 0 0 0 0 0 0 1 0 Figure A.26 Relationship of Signed and Unsigned Numbers Arithmetic Using 2’s Complement Numbers Since a number in the 2’s complement form still is a binary set of digits, all the addition rules presented earlier in this chapter still apply.
Page 353 Technician’s Guide to the 68HC11 Microcontroller Decimal 0 0 0 0 0 0 1 1 0 0 0 0 1 0 0 1 0 0 0 0 1 1 0 0 C D E F unused hex symbols in BCD...
Page 354 Computer Mathematics produces a carry from the first column to the next. This carry satisfies Rule 2, so 6 must be added to achieve the proper result of 86. A.5 Numeric Notation When performing mathematical calculations of any type, it is often more important to have the proper units for what is being calculated than the absolute accuracy of the calculated value.
Page 355 Technician’s Guide to the 68HC11 Microcontroller Decimal Notation 1,024 1,048,576 1,073,741,824 1,099,511,627,776 Figure A.32 Notation Using Powers of Two be powers of two. The number of possible combination of eight bits can be expressed as 1 × 2 = 256. The number of memory locations that can be addressed by a 16-bit address bus is 1 ×...
Page 356 Computer Mathematics 0001 * This subroutine is designed to perform an addition 0002 0003 * of two 32-bit words. The X register contains the address * of the data block, where the first four bytes are occupied 0004 0005 * by the first word, next four by the second word, and the * last four by the result.
Page 357 Technician’s Guide to the 68HC11 Microcontroller operate in the IMM, DIR, EXT, INDX and INDY addressing modes, and they affect the N, Z, V and C bits of the CCR. Placement of Radix Point The result of the IDIV instruction assumes that the result is to the left of the radix point.
Page 358 Computer Mathematics expects the numerator to be less than the denominator so that it can calculate the value to the right of the radix point. When FDIV is executed, the result will be $AE14 (stored in X) and the remainder $000C (stored in D). The remainder represents the difference between 0.680000 and the calculated binary-weighted equivalent 0.679993.
Page 360 a p p e n d i x Booting from EEPROM Bootin g from EEPROM The BUFFALO monitor program and the EVBU were designed to allow simple access to programs loaded into the EEPROM. The programs loaded into the EEPROM can be used as the startup software after reset.
Page 361 Technician’s Guide to the 68HC11 Microcontroller The following entries may be necessary if these features are being used in the EEPROM program. Initialize the Interrupt Jump Table (only necessary if interrupts are being used). ($E357 for BUFFALO 3.4) VECINIT Initialize the Timer Prescaler (only necessary if prescaler other than default is being used).
Page 362 a p p e n d i x Loading Programs Directly into the EEPROM HC11 P rogramming The following procedure is the process that can be used to successfully load a user program into the EEPROM. This process includes reducing the baud rate of the serial communications interface.
Page 363 Technician’s Guide to the 68HC11 Microcontroller 4. Change PROCOMM to talk 300 baud. In PROCOMM, enter the baud rate screen (ALT-P) and select 7 (300, N, 8, 1). Do not save these settings to disk. Press ESC to exit this screen.
Page 364 a p p e n d i x Acronym List Acron ym List Add AccB to AccA Add AccB to Index Register X Add AccB to Index Register Y AccA Accumulator A AccB Accumulator B AccD Accumulator D ADDA Add to AccA ADDB Add to AccB ADDD...
Page 365 Technician’s Guide to the 68HC11 Microcontroller Branch If Greater Than or Equal (Signed) Branch If Greater Than (Signed) Branch If Higher (Unsigned) Branch If Higher or Same (Unsigned) Branch If less Than or Equal (Signed) Branch If Lower (Unsigned) Branch If Lower or Same (Unsigned)
Page 366 Acronym List COMA Complement AccA (Logical NOT) COMB Complement AccB (Logical NOT) Compare Memory to AccD Central Processing Unit Compare Memory to AccX Compare Memory to AccY Destination Address Decimal Adjust AccA Decrement a Byte in Memory DECA Decrement AccA DECB Decrement AccB Decrement Stack Pointer...
Page 367 Technician’s Guide to the 68HC11 Microcontroller INCA Increment AccA INCB Increment AccB Index Addressing Mode on the HC11 INDX Index Addressing Mode that uses the X index register INDY Index Addressing Mode that uses the Y index register Inherent Addressing Mode on the HC11...
Page 368 Acronym List Memory Data Register MODA/B Mode A/B (pins on HC11) Most Significant Bit Multiply Negate a Byte in Memory NEGA Negate AccA NEGB Negate AccB No Operation Nonreturn-to-zero ORAA Logical OR AccA with Byte from Memory ORAB Logical OR AccB with Byte from Memory Originate Program Counter Phase 1 of internal machine clock...
Page 369 Technician’s Guide to the 68HC11 Microcontroller Read Only Memory Rotate Right Byte in Memory RORA Rotate Right AccA RORB Rotate Right AccB Sign Relative Mode Offset Real Time Interrupt Return from Subroutine Subtract AccB from AccA Serial Communications Interface Set Carry Flag in CCR...
Page 370 Acronym List Transfer Stack Pointer to Index Register Y Transfer Index Register X to Stack Pointer Transfer Index Register Y to Stack Pointer User Interface XGDX Exchange AccD and Index Register X XGDY Exchange AccD and Index Register Y...
Page 372 Glos sary g l o s s a r y 1’s complement The inversion of all the bits in a binary word (logical NOT). 2’s complement A method of representing signed binary data. Absolute Addressing The effective address of the operand is stored in memory following the instruction opcode.
Page 373 Technician’s Guide to the 68HC11 Microcontroller Analog Data Data that is continuous in nature. Arithmetic Logic Unit (ALU) Major subsystem of a processor. It is responsible for performing simple mathematical operations like addition and subtraction, logical AND, OR and NOT operations and data shifting.
Page 374 Glossary Byte Eight bits of binary data grouped into a data word. A byte is the fundamental data unit on most computers. The HC11 processes data in one- or two-byte units. Central Processing Unit (CPU) A term used to refer to the main processor in a system. Channel A path of analog data to be converted to digital.
Page 375 Technician’s Guide to the 68HC11 Microcontroller EPROM Erasable Programmable ROM. It can be field programmed as well as erased via ultraviolet light and then reprogrammed. Event Signal transition, high to low or low to high. Execute Cycle All machine cycles other than the fetch cycle necessary to complete the execution of an instruction.
Page 376 Glossary Index Register X or Y 16-bit address registers used by the HC11 index addressing mode instructions. They can also be used as general-purpose, 16-bit data registers. Indexed Addressing Uses a base address plus an index (address offset) to determine the effective address of the operand.
Page 377 Technician’s Guide to the 68HC11 Microcontroller for all versions of BUFFALO, regardless of the actual locations of the subroutines in memory. Label A name of a byte or data or an address used in a program. Least Significant Bit (LSB) The lowest-order binary bit within a data word. This bit has the lowest binary weighting (i.e., for %00000001, the 1 is the LSB).
Page 378 Glossary Memory Map The layout of each memory block within the entire address space. Mnemonics Special abbreviations (English-like words) that are the keywords of assembly-level programming languages. Each mnemonic correlates to a single machine code instruction. Monitor Program A piece of software that controls the functions of a system and provides a user interface so that users can interact with the system.
Page 379 Technician’s Guide to the 68HC11 Microcontroller Pass by Reference A method of passing data to a subroutine that allows the data to be changed. During the execution of the subroutine, the data is accessed via a reference (memory address or register), processed and returned to the reference location before returning to the calling program.
Page 380 Glossary Relative Addressing Used to change the flow of the program so that the instructions do not have to be laid out in a sequential manner. The address of the next instruction is calculated relative to the current position in memory. The HC11 has one relative addressing mode that is used only by branching instructions.
Page 381 Technician’s Guide to the 68HC11 Microcontroller Status Flags A set of bits in the condition code register and other status registers throughout the HC11 system that are used to indicate the status or condition of the processor. Status Register A group of bits that indicate the status of the last operation (processor status).

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