Tektronix 2215 Instruction Manual page 71

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The sum o f the tw o channel vertical signals is displayed,
and the sum o f the tw o channel trigger signals is used as the
internal trigger signal.
Summation is accomplished by the HI logic levels from
U 317A pins 5 and 6 causing both the CH 1 Trig and CH 2
Trig signals to go LO. W ith the input transistors to both
Trigger P icko ff A m plifiers biased o ff, additional c irc u itry
w ith in the Trigger P ickoff am plifiers biases on the p ic k o ff
transistors fo r both Channel 1 and Channel 2 (see the
Channel 1 and Channel 2 Pream plifier c irc u it descriptions.
A CHOP V E R T IC A L MODE display also uses the sum o f
the tw o internal trigger signals, but the switching logic
involved is diffe re n t from the A DD V E R T IC A L MODE
display. W ith S315 set to CHOP, a LO logic level is applied
to U305B pin 5 and to U305C pin 9 from the X Y signal
line via contacts on S315, S317, and S305. The outputs o f
both U305C and U305B are LO and are applied to the
w ired-A N D connection on the CH 1 T rig and C H 2 T rig
signal lines. These LO signals override the outputs from
U315C and U315B to hold the in p u t transistors o f both
Channel 1 and Channel 2 Trigger P icko ff A m p lifie rs biased
o ff. Channel 1 and Channel 2 Trigger signals are summed
as described previously fo r the A D D V E R T IC A L MODE
display.
X -Y MODE. When the A S EC /D IV switch is set to X -Y ,
the Channel 2 signal is selected as the in p u t to the V ertical
O u tp ut A m p lifie r to provide the X -A xis deflection. The
Channel 1 Trigger signal provides the X -A xis signal to the
X Y A m p lifie r (Diagram 7) via
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the Internal Trigger
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