Timers, Counters And Code Blocks Supported - Siemens SIMATIC S7 Functional Safety Manual

Technical data
Time delay interrupts
Cyclic interrupts
Edge interrupts
Memory card
Real time clock accuracy
Real time clock retention time
The slower speed is applicable when the HSC is configured for quadrature mode of operation.
1
For CPU models with relay outputs, you must install a digital signal board (SB) to use the pulse outputs.
2
Table A- 28 Performance
Type of instruction
Boolean
Move Word
Real math
A.2.3.2

Timers, counters and code blocks supported

Table A- 29 Blocks, timers and counters supported by CPU 1215FC
Element
Blocks Type
Size
Quantity
Address range for FBs, FCs,
and DBs
Nesting depth
Monitoring
OBs Program cycle
Startup
Time-delay interrupts
Cyclic interrupts
Hardware interrupts
Time error interrupts
Diagnostic error interrupts
Pull or plug of modules
Rack or station failure
Time of day
Status
Update
Profile
S7-1200 Functional Safety Manual
Manual, 02/2015, A5E03470344-AA
Description
4 total with 1 ms resolution
4 total with 1 ms resolution
12 rising and 12 falling (16 and 16 with optional signal board)
SIMATIC Memory Card (optional)
+/- 60 seconds/month
20 days typ./12 days min. at 40 °C (maintenance-free Super Capacitor)
Execution speed
0.08 μs/instruction
1.7 μs/instruction
2.3 μs/instruction
Description
OB, FB, FC, DB
64 Kbytes
Up to 1024 blocks total (OBs + FBs + FCs + DBs)
FB and FC: 1 to 65535 (such as FB 1 to FB 65535)
DB: 1 to 59999
16 from the program cycle or startup OB
6 from any interrupt event OB
Status of 2 code blocks can be monitored simultaneously
Multiple
Multiple
4 (1 per event)
4 (1 per event)
50 (1 per event)
1
1
1
1
Multiple
1
1
1
Technical specifications
A.2 Fail-Safe CPU technical specifications
161