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Pin No.
Pin Name
24
D36
25
D42
26
D37
27
D41
28
D38
29
D40
30
D39
31
VDDQ
32
VSSQ
33
D15
34
D0
35
D14
36
D1
37
D13
38
D2
39
VDD
40
VSS
41
D12
42
D3
43
VDDQ
44
VSSQ
45
D11
46
D4
47
D10
48
D5
49
D9
50
D6
51
BACK/BSREQ
52
BREQ/BSACK
53
D8
54
D7
55
CKE
56
VDDQ
57
VSSQ
58
WE5/CAS5/DQM5
59
WE4/CAS4/DQM4
60
WE1/CAS1/DQM1
61
WE0/CAS0/DQM0
62
A17
63
A16
64
A15
65
VDD
66
VSS
67
A14
68
A13
69
VDDQ
70
VSSQ
71
A12
72
A11
73
A10
74
A9
75
A8
76
A7
77
CKIO
78
VDDQ
79
VSSQ
80
A6
I/O
Function
I/O
Data/Port
I/O
Data/Port
I/O
Data/Port
I/O
Data/Port
I/O
Data/Port
I/O
Data/Port
I/O
Data/Port
Power IO VDD (3.3V)
Power IO GND (0V)
I/O
Data
I/O
Data
I/O
Data
I/O
Data
I/O
Data
I/O
Data
Power Internal VDD (1.8V)
Power Internal GND (0V)
I/O
I/O
Power IO VDD (3.3V)
Power IO GND (0V)
I/O
Data
I/O
Data
I/O
Data
I/O
Data
I/O
Data
I/O
Data
O
Bus recognition/Bus request
I
Bus request/Bus recognition
I/O
Data
I/O
Data
O
Clock out enable
Power IO VDD (3.3V)
Power IO GND (0V)
O
D47-D40 select signal
O
D39-D32 select signal
O
D15-D8 select signal
O
D7-D0 select signal
O
Address
O
Address
O
Address
Power Internal VDD (1.8V)
Power Internal GND (0V)
O
Address
O
Address
Power IO VDD (3.3V)
Power IO GND (0V)
O
Address
O
Address
O
Address
O
Address
O
Address
O
Address
O
Clock output
Power IO VDD (3.3V)
Power IO GND (0V)
O
Address
Memory Interface
Reset
SRAM
DRAM
SDRAM PCMCIA
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
CKE
WE5
CAS5
DQM5
WE4
CAS4
DQM4
WE1
CAS1
DQM1
WE0
CAS0
DQM0
CKIO
DN-V1700
MPX
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
A15
A0
A14
A1
A13
A2
A12
A3
A11
A4
A10
A5
A9
A6
A8
A7
WE1
13
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