Aaeon FWS-2251 User Manual
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Aaeon FWS-2251 User Manual

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FWS-2251
Network Appliance
st
User's Manual 1
Ed
Last Updated: February 22, 2016

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Summary of Contents for Aaeon FWS-2251

  • Page 1 FWS-2251 Network Appliance User’s Manual 1 Last Updated: February 22, 2016...
  • Page 2 AAEON assumes no liabilities resulting from errors or omissions in this document, or from the use of the information contained herein. AAEON reserves the right to make changes in the product design without notice to its users.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp.  Intel, Pentium, Celeron, and Xeon are registered trademarks of Intel Corporation  Core, Atom are trademarks of Intel Corporation ...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity FWS-2251  Power adapter  Rubber foot  Product DVD  If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document. Preface...
  • Page 6 All cautions and warnings on the device should be noted. All cables and adapters supplied by AAEON are certified and in accordance with the material safety laws and regulations of the country of sale. Do not use any cables or adapters not supplied by AAEON to prevent system malfunction or fires.
  • Page 7 As most electronic components are sensitive to static electrical charge, be sure to ground yourself to prevent static charge when installing the internal components. Use a grounding wrist strap and contain all electronic components in any static-shielded containers. If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii.
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications ..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................5 Dimensions ....................... 6 Jumpers and Connectors ..................9 List of Jumpers ....................... 11 2.3.1 Auto PWRBTN Selection (JP1) ............12 2.3.2 ME Setting Selection (CN2)..............
  • Page 12 3.4.7 Advanced: Serial Port Console Redirection ........27 3.4.7.1 Serial Port Console Redirection: Console Redirection Settings 28 3.4.7.2 Serial Port Console Redirection: Out-of-Band Management Port ..................30 3.4.8 Advanced: SIO Configuration ............31 3.4.8.1 SIO Configuration: Serial Port Configuration ..... 32 Setup submenu: Chipset ..................

  • Page 13: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 14: Specifications

    Specifications System ® ® Onboard Intel Celeron J1900 (2M cache, up, Processor  to 2.42 GHz) 204-pin DDR3L 1333MHz SODIMM x 2, up to System Memory  Chipset  Processor integrated VGA Controller  ® Intel Ethernet Controller I211-AT Ethernet ...
  • Page 15 socket x 1) Optional mSATA slot x 1 (shared with top side MiniCard slot) Power LED x 1 Front Panel I/O  Status LED (Optional) x 1 HDD Active LED x 1 LAN LED x 8 RSSI LED (Optional) x 2 SIM Cover x 1 Antenna Hole x 3 USB 3.0 Ports x 1...
  • Page 16 Environmental 0 ~ 40°C (32 ~ 104°F) Operating Temperature  -20 ~ 70°C (4 ~ 158°F) Storage Temperature  10 ~ 80% Operating Humidity  10 ~ 80% @ 40°C, non-condensing Storage Humidity  2.0 G /5~500Hz/ operation (SATA DOM) Anti-Vibration ...

  • Page 17: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 18: Dimensions

    Dimensions System Chapter 2 – Hardware Information...
  • Page 19 Board Chapter 2 – Hardware Information...
  • Page 20 Chapter 2 – Hardware Information...

  • Page 21: Jumpers And Connectors

    Jumpers and Connectors Component Side Chapter 2 – Hardware Information...
  • Page 22 Chapter 2 – Hardware Information...

  • Page 23: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function Auto Power Button Clear ME Clear CMOS CF Power Select CN30 Power Button CN31 Software Reset Chapter 2 –...

  • Page 24: Auto Pwrbtn Selection (Jp1)

    2.3.1 Auto PWRBTN Selection (JP1) Function Disable Auto PWRBTM (default) Enable Auto PWRBTN 2.3.2 ME Setting Selection (CN2) Function Clear ME Normal (default) 2.3.3 CMOS Setting Selection (CN3) Function Clear CMOS Normal (default) 2.3.4 CF Power Selection (CN6) Function 3.3 V Chapter 2 –...

  • Page 25: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function HDD POWER HDD POWER CF SOCKET CN16 COM1 CN19 2*USB2.0 CN21 +12V POWER IN CN22 Mini-card socket CN24 Battery CN26...

  • Page 26: Hdd Power (Cn1/ Cn4)

    SATA1 SATA Connector 2.4.1 HDD Power (CN1/ CN4) Signal Signal +12V 2.4.2 VGA Connector (CN28) Signal Signal BLUE GREEN 2.4.3 SATA Power Connector (CN10) Signal Signal KDAT KCLK MDAT KCLK Chapter 2 – Hardware Information...

  • Page 27: Cpu Fan (Cpu_Fan)

    2.4.4 CPU Fan (CPU_FAN) Signal Signal +12V FANTAC FANCONTROL Chapter 2 – Hardware Information...

  • Page 28: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 29: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory.

  • Page 30: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...

  • Page 31: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...

  • Page 32: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...

  • Page 33: Advanced: Cpu Configuration

    3.4.1 Advanced: CPU Configuration Options summary: Intel Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default EIST Disabled Enabled Optimal Default, Failsafe Default Chapter 3 – AMI BIOS Setup...

  • Page 34: Advanced: Ide Configuration

    3.4.2 Advanced: IDE Configuration Options summary: SATA Mode IDE Mode AHCI Mode Optimal Default, Failsafe Default Chapter 3 – AMI BIOS Setup...

  • Page 35: Advanced: Usb Configuration

    3.4.3 Advanced: USB Configuration Options summary: Legacy USB Support Enabled Optimal Default, Failsafe Default Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS. AUTO option disables legacy support if no USB devices are connected Device Name (Emulation Auto Optimal Default, Failsafe Default...

  • Page 36: Advanced: Hardware Monitor

    3.4.4 Advanced: Hardware Monitor Options summary: CPU_FAN Smart Disabled Optimal Default, Failsafe Default Control Enabled Chapter 3 – AMI BIOS Setup...

  • Page 37: Advanced: Power Management

    3.4.5 Advanced: Power Management Options summary: Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode. Restore on Power Last State Optimal Default, Failsafe Default Loss Power On Power Off Select power state when power is re-applied after a power failure. RTC wake system Disabled Optimal Default, Failsafe Default...

  • Page 38: Advanced: Lan Bypass Configuration

    3.4.6 Advanced: LAN Bypass Configuration Options summary: LAN Bypass Status LED LED OFF Optimal Default, Failsafe Default RED LED ON RED LED BLINK RED LED FAST BLINK GREEN LED ON GREEN LED BLINK GREEN LED FAST BLINK Configure LAN Bypass Status LED. Mode for Power-on PassTru Optimal Default, Failsafe Default...

  • Page 39: Advanced: Serial Port Console Redirection

    Configure WDT behavior , System Reset , Force Bypass 3.4.7 Advanced: Serial Port Console Redirection Options summary: Console Disabled Redirection Enabled Optimal Default, Failsafe Default Console Redirection Enable or Disable Chapter 3 – AMI BIOS Setup...

  • Page 40: Serial Port Console Redirection: Console Redirection

    3.4.7.1 Serial Port Console Redirection: Console Redirection Settings Options summary: Terminal Type VT100 VT100+ VT-UTF8 ANSI Optimal Default, Failsafe Default Emulation: ANSI, VT100, VT100+, VT-UTF8 Bit per second 9600 19200 38400 57600 115200 Optimal Default, Failsafe Default Selects serial port transmission speed Data Bits Optimal Default, Failsafe Default Data Bits...
  • Page 41 Parity None Optimal Default, Failsafe Default Even Mark Space A parity bit can be sent with the data bits to detect some transmission errors. Stop Bits Optimal Default, Failsafe Default Stop bits indicate the end of a serial data packet. Flow Control None Optimal Default, Failsafe Default...

  • Page 42: Management Port

    3.4.7.2 Serial Port Console Redirection: Out-of-Band Management Port Options summary: Terminal Type VT100 VT100+ VT-UTF8 Optimal Default, Failsafe Default ANSI Emulation: ANSI, VT100, VT100+, VT-UTF8 Bit per second 9600 19200 57600 115200 Optimal Default, Failsafe Default Selects serial port transmission speed Flow Control None Optimal Default, Failsafe Default...

  • Page 43: Advanced: Sio Configuration

    3.4.8 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup...

  • Page 44: Sio Configuration: Serial Port Configuration

    3.4.8.1 SIO Configuration: Serial Port Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default En/Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8; IRQ=4; IO=2F8; IRQ=3; Select an optimal setting for IO device Chapter 3 –...

  • Page 45: Setup Submenu: Chipset

    Setup submenu: Chipset Chapter 3 – AMI BIOS Setup...

  • Page 46: Chipset: North Bridge

    3.5.1 Chipset: North Bridge Chapter 3 – AMI BIOS Setup...

  • Page 47: North Bridge: Display Control Configuration

    3.5.1.1 North Bridge: Display Control Configuration Options summary: DVMT Pre-Allocated Optimal Default, Failsafe Default 128M 160M … 192M 224M 256M 288M 320M 352M 384M 416M 448M 480M 512M Select DVMT 5.0 Pre-Allocated Graphics Memory size Chapter 3 – AMI BIOS Setup...
  • Page 48 DVMT Total Gfx Mem 128MB 256MB Optimal Default, Failsafe Default Select DVMT 5.0 Total Graphics Memory size used by the Internal Graphics Device Chapter 3 – AMI BIOS Setup...

  • Page 49: Setup Submenu: Security

    Setup submenu: Security Change User/Administrator Password You can set a User Password once an Administrator Password is set. The password will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility. Select the password you wish to set, press Enter to open a dialog box to enter your password (you can enter no more than six letters or numbers).

  • Page 50: Setup Submenu: Boot

    Setup submenu: Boot Options summary: Quiet Boot Disabled Enabled Default En/Disable showing boot logo. Option ROM Messages Force BIOS Default Keep Current Set display mode for Option ROM Launch PXE OpROM Disabled Default Enabled En/Disable Legacy Boot Option Chapter 3 – AMI BIOS Setup...

  • Page 51: Boot: Bbs Priorities

    3.7.1 Boot: BBS Priorities Chapter 3 – AMI BIOS Setup...

  • Page 52: Setup Submenu: Exit

    Setup submenu: Exit Chapter 3 – AMI BIOS Setup...

  • Page 53: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 54: Driver Installation

    Driver Installation The drivers can be found in the product page for FWS-2251 at aaeon.com. Please follow the sequence below to install the drivers. Step 1 – Install Chipset Drivers Download and open Chipset.exe Follow the instructions Drivers will be installed automatically Step 2 –...
  • Page 55 Follow the instructions Drivers will be installed automatically Chapter 4 – Driver Installation...

  • Page 56: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...

  • Page 57: Watchdog Timer Initial Program

    A.1 Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value...
  • Page 58 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4 #define byte TimerVal // This parameter is represented from Note24...
  • Page 59 ************************************************************************************ VOID Main(){ // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ************************************************************************************ Appendix A – Watchdog Timer Programming...
  • Page 60 ************************************************************************************ // Procedure : AaeonWDTEnable VOID AaeonWDTEnable (){ WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 1); // Procedure : AaeonWDTConfig VOID AaeonWDTConfig (){ // Disable WDT counting WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 0); // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting(); VOID WDTEnableDisable(byte LDN, byte Register, byte BitNum, byte Value){ SIOBitSet(LDN, Register, BitNum, Value);...
  • Page 61 ************************************************************************************ VOID SIOEnterMBPnPMode(){ Switch(SIOIndex){ Case 0x2E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0x55); Break; Case 0x4E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0xAA); Break; VOID SIOExitMBPnPMode(){ IOWriteByte(SIOIndex, 0x02); IOWriteByte(SIOData, 0x02); VOID SIOSelectLDN(byte LDN){ IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, LDN);...
  • Page 62 ************************************************************************************ VOID SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value){ Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 << BitNum); TmpValue |= (Value << BitNum); IOWriteByte(SIOData, TmpValue); SIOExitMBPnPMode(); VOID SIOByteSet(byte LDN, byte Register, byte Value){ SIOEnterMBPnPMode();...

  • Page 63: Appendix B - I/O Information

    Appendix B Appendix B - I/O Information...

  • Page 64: I/O Address Map

    I/O Address Map Appendix B – I/O Information...
  • Page 65 Appendix B – I/O Information...

  • Page 66: Memory Address Map

    Memory Address Map Appendix B – I/O Information...

  • Page 67: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...
  • Page 68 Appendix B – I/O Information...
  • Page 69 Appendix B – I/O Information...

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