Hardware Design; Pin Usage; Table 7. Module Pin Usage - ST SPLML-868 Preliminary Data Sheet

3

Hardware design

3.1

Pin usage

If used with the default firmware and interfaced to a host MCU, at a minimum the SP1ML
module requires power, ground and UART transmit and receive signals to be connected.
Other signals are optional and provide additional functionality. These signals are outlined
in the following table. Unused signals must not be connected.
Table 7.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Module pin usage
Name
An active-low open drain output that can drive an
TXRXLED
external LED for TX/RX activity status indication.
Drive this signal low to put the module into a low
WKUP power shutdown mode. Float or drive the signal high
to wake the module.
GPIO0 Reserved for future use, do not connect.
GPIO1 Reserved for future use, do not connect.
Drive this signal low to force the module into
operating mode. Drive this signal high to force the
MODE0 module into command mode. This enables faster
switching between modes and obviates the need for
escape sequences.
MODE1 Reserved for future use, do not connect.
VDD Connect to power supply, 1.8V to 3.6V.
GND Connect to system ground.
These signals are the serial wire debug (SWD)
SWDIO
interface to the STM32L microcontroller, supporting
SWCLK
the development and loading of custom firmware.
Drive this signal high at power up or reset to start the
BOOTMODE boot loader and allow device firmware update over
the UART interface.
Drive this signal low to hold the module in reset. Drive
RESET
this signal high to release the module from reset.
TXD Connect to the host system UART RXD input.
RXD Connect to the host system UART TXD output.
Connect to the host system UART CTS output if flow
RTS
control is required.
Connect to the host system UART RTS input if flow
CTS
control is required.
Description
Doc ID TBD Rev 0.8
Optional
Yes
Yes
Yes
Yes
Yes
Yes
No
No
Yes
Yes
Yes
Yes
No
No
Yes
Yes
9/19
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