ICP DAS USA PCI-D64HU User Manual page 13

1. Digital output data is moved from PC's memory to DO FIFO by bus
mastering DMA data transfer.
2. Move output data from FIFO to digital output circuit.
3. Output data is ready.
4. An O_REQ signal is generated and sent to the external device.
5. After an O_ACK is captured, steps 2-5 will be repeated.
** If the FIFO is not full, the output data is moved form PC's
main memory to FIFO automatically.
DO Ring Buffer Mode
The ring buffer is managed in hardware level and the size of the ring buffer can be
set by user. When the DO FIFO is set as ring buffer mode, the last buffer of the DO
buffer will be chained with the first buffer. No bus loading is required which makes
PCI-D64HU perfect for repetitive pattern generation application.
PCI-D64HU User's Manual (Ver.1.0, Dec/2009)
O_REQ
4
( Output signal )
O_ACK
5
( Input signal )
PC's Main
Memory
Bus mastering
1
DMA data Transfer
Digital
Output Data
3
Move Data to
Digital Output
2
Digital
Output FIFO
13