Allen-Bradley 1747-SN User Manual page 152

Rung 2:5
If a BTR errors, unlatch the BTR enable bit and the BTR pending bit. In addition,
the BTR error code (N7:63 OR M1:1.103) must be viewed or buffered to determine the
cause of the error.
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| BTR ERROR
| BIT
| N7:60
|––––] [––––––––––––––––––––––––––––––––––––––––––––––––––––––––+––––(U)–––––+–|
| 12
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Rung 2:6
If a BTW errors, unlatch the BTW enable bit and the BTW pending bit. In addition,
the BTW error code (N7:67 OR M1;1.203) must be viewed or buffered to determine the
cause of the error.
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| BTW ERROR
| BIT
| N7:64
|––––] [––––––––––––––––––––––––––––––––––––––––––––––––––––––––+––––(U)–––––+–|
| 12
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Rung 2:7
Free–running timer to execute a BTR to the analog input in Logical Rack 3, Group 7
left slot every 100ms (0).
| T4:0
|––]/[–––––––––––––––––––––––––––––––––––––––––––––––+TIMER ON DELAY
| DN
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Rung 2:8
Initiate a BTR every 100ms as long as a BTR is not in progress. A complete cycle
requires that when complete or error, the ladder program unlatches the enable bit
and the scanner then unlatches the done bit. A new BTR must not be initiated until
these conditions occur.
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| BTR ENABLE|BTR DONE
| BIT |BIT
| T4:0 M0:1.100 M1:1.100
|––] [–––––]/[––––––––]/[–––––––––––––––––––––––––––––––––––––––+––––(L)–––––+–|
| DN 15
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13
Application Examples
SERVICE
THE BTR
STATUS/
BTR
PENDING
B3:0
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| BTR ENABLE | |
| BIT
| M0:1.100 | |
+––––(U)–––––+ |
15
BTW ENABLE
BIT
M0:1.200
| 15
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| SERVICE
| THE BTW
| STATUS/
| BTW
| PENDING
| B3:0
+––––(U)–––––+ |
+TON–––––––––––––––+
|Timer T4:0+–(DN) |
|Time Base 0.01|
|Preset 10|
|Accum 0|
+––––––––––––––––––+
SERVICE
THE BTR
STATUS/
BTR
PENDING
B3:0
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| BTR ENABLE | |
| BIT
| M0:1.100 | |
+––––(L)–––––+ |
15
Publication 1747 6.6 - July 1996
7–19
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+–(EN)–|
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