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Freescale Semiconductor
Reference Manual Addendum
MCF5235 Reference Manual Errata
by: Microcontroller Division
This errata document describes corrections to the
MCF5235 Reference Manual, order number
MCF5235RM. For convenience, the addenda items are
grouped by revision. Please check our website at
http://www.freescale.com/coldfire
The current version available of the MCF5235 Reference
Manual is Revision 2.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
for the latest updates.
Table of Contents
1
Errata for Revision 2 ............................................2
2
Errata for Revision 1.1 .........................................5
3
Revision History ..................................................8
MCF5235RMAD
Rev. 2.2, 05/2007

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Summary of Contents for NXP Semiconductors MCF5235

  • Page 1 MCF5235RM. For convenience, the addenda items are Revision History ..........8 grouped by revision. Please check our website at http://www.freescale.com/coldfire for the latest updates. The current version available of the MCF5235 Reference Manual is Revision 2. © Freescale Semiconductor, Inc., 2007. All rights reserved.
  • Page 2 Change QSPI_CS1 pin location from “—” to 139 for the 160QFP device. Table 12-9/Page 12-21 Change footnote from “...of the RCSC field in the CIM reset configuration register.” to “... of the RCR[RCSC] field in the reset controller.” MCF5235 Reference Manual Errata, Rev. 2.2 Freescale Semiconductor...
  • Page 3 Section 14.4/Page 14-13 Remove last sentence in this section starting with “BCRn decrements...” since SAA bit is not supported. Section 14.4.4.1/Page 14-16 Change DREQ[32:0] to DREQ[3:0]. MCF5235 Reference Manual Errata, Rev. 2.2 Freescale Semiconductor...
  • Page 4 Correct bit locations for CTRM and DKP fields: 31–13 Reserved 12–9 CTRM 7–5 Reserved Table 32-13/Page 32-13 Add the following note to the PBR[Address] field description: Note: PBR[0] should always be loaded with a 0. MCF5235 Reference Manual Errata, Rev. 2.2 Freescale Semiconductor...
  • Page 5 Add entry in table for PSTCLK output signal. “PSTCLK indicates when the development system should sample PST and DDATA values.” Figure 3-6/Page 3-17 The reset value of D0[DEBUG] is 0x0. The debug revision of the MCF5235 is Rev. A. Table Table 3-10/Page 3-18 3-10 is incorrect as well.
  • Page 6 The last sentence should read: “Port size for CS0 is configured by the logic levels of D[20:19] when RSTOUT negates and RCON is asserted.” Table 16-6/Page 16-9 In the CSMRn[BAM] bit description, the first example BAM bit setting is incorrect. Change from 0x0008 to 0x0001. MCF5235 Reference Manual Errata, Rev. 2.2 Freescale Semiconductor...
  • Page 7 Replace CLKOUT with PSTCLK throughout. Chapter 32 Add the following note to the beginning of the eTPU debug section: “eTPU debug functionality is not available when the ColdFire processor is halted (STOP, DOZE, or WAIT modes).” MCF5235 Reference Manual Errata, Rev. 2.2 Freescale Semiconductor...
  • Page 8: Revision History

    • Added SDRAM address line note errata. • Added DMA Timer MODE16 bit errata. • Added MDHA & SKHA application examples errata. • Added the SKMR[CTRM] bit field errata. • Added watchdog timer divide-by value errata. 07/2006 MCF5235 Reference Manual Errata, Rev. 2.2 Freescale Semiconductor...
  • Page 9 • Added DMA figure overbars errata. • Added DMA external request and acknowledge operation section errata. • Added DMA SAA bit errata. • Added IPSBAR note in SCM chapter. • Added global IACK space errata. MCF5235 Reference Manual Errata, Rev. 2.2 Freescale Semiconductor...
  • Page 10 How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany...