Programming - Aaeon PFM-800P User Manual

Pc/104 cpu module intel ultra low voltage celeron m processor 24/48-bit dual-channel lvds 2 com/ 2 usb2.0 compactflash/ pci-104 interface
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P C / 1 0 4 C P U M o d u l e
P F M - 8 0 0 P
A.1 Programming
PFM-800P utilizes IT8712F-A chipset as its watchdog timer
controller. Below are the procedures to complete its configuration
and the AAEON intial watchdog timer program is also attached
based on which you can develop customized program to fit your
application.
Configuring Sequence Description
After the hardware reset or power-on reset, the IT8712F-A enters
thenormal mode with all logical devices disabled except KBC. The
initial state (enable bit ) of this logical device (KBC) is determined
by the state of pin 121 (DTR1#) at the falling edge of the system
reset during power-on reset.
A - 2
Appendix A Programming the Watchdog Timer

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