Texas Instruments TRF7970A Instruction Manual
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Texas Instruments TRF7970A Instruction Manual

Multiprotocol fully integrated 13.56-mhz rfid and near field communication (nfc) transceiver ic
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TRF7970A Multiprotocol Fully Integrated 13.56-MHz RFID and Near Field Communication

1 Device Overview

1.1

Features

1
• Supports Near Field Communication (NFC)
Standards NFCIP-1 (ISO/IEC 18092) and NFCIP‑2
(ISO/IEC 21481)
• Completely Integrated Protocol Handling for
ISO15693, ISO18000-3, ISO14443A/B, and
FeliCa™
• Integrated Encoders, Decoders, and Data Framing
for NFC Initiator, Active and Passive Target
Operation for All Three Bit Rates (106 kbps,
212 kbps, 424 kbps) and Card Emulation
• RF Field Detector With Programmable Wake-Up
Levels for NFC Passive Transponder Emulation
Operation
• RF Field Detector for NFC Physical Collision
Avoidance.
• Integrated State Machine for ISO14443A
Anticollision (Broken Bytes) Operation
(Transponder Emulation or NFC Passive Target)
• Input Voltage Range: 2.7 VDC to 5.5 VDC
1.2

Applications

•
Mobile Devices (Tablets, Handsets)
•
Secure Pairing ( Bluetooth
Wireless Networks)
•
Public Transport or Event Ticketing
•
Passport or Payment (POS) Reader Systems
1.3

Description

The TRF7970A device is an integrated analog front end and data-framing device for a 13.56-MHz RFID
and Near Field Communication (NFC) system. Built-in programming options make the device suitable for a
wide range of applications for proximity and vicinity identification systems.
The device can perform in one of three modes: RFID and NFC reader, NFC peer, or in card emulation
mode. Built-in user-configurable programming options make the device suitable for a wide range of
applications. The TRF7970A device is configured by selecting the desired protocol in the control registers.
Direct access to all control registers allows fine tuning of various reader parameters as needed.
Documentation, reference designs, EVM, and source code TI MSP430™ MCUs or ARM
available.
PART NUMBER
TRF7970ARHB
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Sample &
Product
Buy
Folder
(NFC) Transceiver IC
®
®
, Wi-Fi
, Other Paired
Device Information
Tools &
Technical
Software
Documents
SLOS743K – AUGUST 2011 – REVISED APRIL 2014
• Programmable Output Power: +20 dBm (100 mW),
+23 dBm (200 mW)
• Programmable I/O Voltage Levels From 1.8 VDC
to 5.5 VDC
• Programmable System Clock Frequency Output
(RF, RF/2, RF/4) from 13.56-MHz or 27.12-MHz
Crystal or Oscillator
• Integrated Voltage Regulator Output for Other
System Components (MCU, Peripherals,
Indicators), 20 mA (Max)
• Programmable Modulation Depth
• Dual Receiver Architecture With RSSI for
Elimination of "Read Holes" and Adjacent Reader
System or Ambient In-Band Noise Detection
• Programmable Power Modes for Ultra Low-Power
System Design (Power Down <1 µA)
• Parallel or SPI Interface (With 127-Byte FIFO)
• Temperature Range: –40°C to 110°C
• 32-Pin QFN Package (5 mm x 5 mm)
•
Short-Range Wireless Communication Tasks
(Firmware Updates)
•
Product Identification or Authentication
•
Medical Equipment or Consumables
•
Access Control, Digital Door Locks
•
Sharing of Electronic Business Cards
PACKAGE
VQFN (32)
Support &
Reference
Community
Design
TRF7970A
®
MCUs are
BODY SIZE
5 mm x 5 mm

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Summary of Contents for Texas Instruments TRF7970A

  • Page 1: Device Overview

    Sharing of Electronic Business Cards Description The TRF7970A device is an integrated analog front end and data-framing device for a 13.56-MHz RFID and Near Field Communication (NFC) system. Built-in programming options make the device suitable for a wide range of applications for proximity and vicinity identification systems.

  • Page 2: Functional Block Diagram

    STATE MACHINE ASK/OOK VSS_RF VOLTAGE SUPPLY REGULATOR SYSTEMS (SUPPLY REGULATORS AND REFERENCE VOLTAGES) VDD_X OSC_IN CRYSTAL OR OSCILLATOR TIMING SYSTEM VSS_D OSC_OUT Figure 1-1. Block Diagram Device Overview Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...

  • Page 3: Table Of Contents

    Terminal Functions .......... Considerations ..........Specifications TRF7970A Reader System Using Parallel ............Absolute Maximum Ratings Microcontroller Interface ....TRF7970A Reader System Using SPI With SS Recommended Operating Conditions ..........Mode ......Electrical Characteristics ......Layout Considerations ........Handling Ratings ..

  • Page 4: Revision History

    Deleted previous Section 10, System Design, and moved contents to Section 7.3 through Section 7.5 ................• Removed references to figure numbers in Figure 7-3 Revision History Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...

  • Page 5: Device Characteristics

    TRF7970A www.ti.com SLOS743K – AUGUST 2011 – REVISED APRIL 2014 3 Device Characteristics Table 3-1 shows the supported modes of operation for the TRF7970A device. Table 3-1. Supported Modes of Operation P2P Initiator or Reader/Writer Card Emulation P2P Target Bit rate...

  • Page 6: Terminal Configuration And Functions

    32-pin RHB package. VDD_A I/0_7 I/0_6 VDD_RF I/0_5 VDD_PA I/0_4 TX_OUT I/0_3 VSS_PA I/0_2 VSS_RX I/0_1 RX_IN1 I/0_0 Figure 4-1. 32-Pin RHB Package (Top View) Terminal Configuration and Functions Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...

  • Page 7: Terminal Functions

    Chip enable input (If EN = 0, then chip is in sleep or power-down mode). Negative supply for internal digital circuits SS_D (1) SUP = Supply, INP = Input, BID = Bidirectional, OUT = Output Terminal Configuration and Functions Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 8 Internally regulated supply (2.7 V to 3.4 V) for digital circuit and external devices (for example, DD_X MCU) Thermal Pad Chip substrate ground Terminal Configuration and Functions Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...

  • Page 9: Specifications

    Input voltage - logic low EN, EN2, ASK/OOK, MOD DD_I/O I/O lines, IRQ, SYS_CLK, DATA_CLK, 0.8 x Input voltage threshold, logic high EN, EN2, ASK/OOK, MOD DD_I/O Specifications Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...

  • Page 10: Electrical Characteristics

    10 MHz. This clock speed is acceptable only when external capacitive load is less than 30 pF. MISO driver has a typical output resistance of 400 Ω (12-ns time constant when 30-pF load used). Specifications Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...

  • Page 11: Handling Ratings

    10 MHz. This clock speed is acceptable only when external capacitive load is less than 30 pF. MISO driver has a typical output resistance of 400 Ω (12-ns time constant when 30-pF load used). Specifications Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...

  • Page 12: Detailed Description

    FeliCa. This includes data rates up to 848 kbps for ISO14443 with all framing and synchronization tasks on board (in default mode). The TRF7970A also supports NFC Tag Type 1, 2, 3, and 4 operations. This architecture enables the customer to build a complete cost-effective yet high-performance multi-protocol 13.56-MHz RFID and NFC system together with a low-cost microcontroller.
  • Page 13 SLOS743K – AUGUST 2011 – REVISED APRIL 2014 The transmitter supports OOK and ASK modulation with selectable modulation depth. The TRF7970A also includes a data transmission engine that comprises low-level encoding for ISO15693, ISO14443A/B and FeliCa. Included with the transmit data coding is the automatic generation of Start Of Frame (SOF), End Of Frame (EOF), Cyclic Redundancy Check (CRC), or parity bits.
  • Page 14 (decoded) data is forwarded to the MCU through the FIFO; SOF, EOF, preamble, sync bytes, CRC, and parity bytes are checked by the framer and discarded. The receiver works same as in the case of an active target. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...

  • Page 15: System Block Diagram

    MCU of any real-time tasks. The unique ID required for anticollision is provided by the MCU after wake-up of the system. System Block Diagram Figure 6-2 shows a block diagram of the TRF7970A. VDD_I/O PHASE & I/O_0...
  • Page 16 DD_A DD_X bypass capacitors for supply noise filtering must be used (per reference schematics). NOTE must be the highest voltage supplied to the TRF7970A. RF Power Amplifier Regulator: V DD_RF The V (pin 3) regulator is supplying the RF power amplifier. The voltage regulator can be set for DD_RF either 5-V or 3-V operation.
  • Page 17 SLOS743K – AUGUST 2011 – REVISED APRIL 2014 Power Amplifier Supply: V DD_PA The power amplifier of the TRF7970A is supplied through V (pin 4). The positive supply pin for the RF DD_PA power amplifier is externally connected to the regulator output V (pin 3).
  • Page 18 . This ensures the highest possible supply DD_RF DD_A DD_X voltage for the RF output stage while maintaining an adequate PSRR (power supply rejection ratio). Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 19 (thus unable to control the EN input). A rising edge applied to the EN2 input (which has an approximately 1-V threshold level) starts the reader supply system and 13.56- MHz oscillator (identical to condition EN = 1). Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 20 Modes 3 and 4 (active modes with the entire RF section active, bit 5 = 1 of register 0x00) are the normal modes used for normal transmit and receive operations. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...

  • Page 21: Receiver - Analog Section

    6.4.1 Main and Auxiliary Receivers The TRF7970A has two receiver inputs: RX_IN1 (pin 8) and RX_IN2 (pin 9). Each of the input is connected to an external capacitive voltage divider to ensure that the modulated signal from the tag is available on at least one of the two inputs.

  • Page 22: Receiver - Digital Section

    ISO14443B 106 kbps, ISO14443A/B data-rates of 212 kbps and 424 kbps and FeliCa 424 kbps. Receiver – Digital Section The output of the TRF7970A analog receiver block is a digitized subcarrier signal and is the input to the digital receiver block. This block includes a Protocol Bit Decoder section and the Framing Logic section.
  • Page 23 IRQ and Status register differs if the chip is configured as RFID reader or as NFC device (including tag emulation). The case of NFC operation is presented in Section 6.12. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 24 ISO14443A, bit rate 106 kbps RX bit rate when TX rate ISO14443 A high bit rate 212 kbps different from RX rate (see register 0x03) Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 25 424 kbps 6.5.1 Received Signal Strength Indicator (RSSI) The TRF7970A incorporates in total three independent RSSI building blocks: Internal Main RSSI, Internal Auxiliary RSSI, and External RSSI. The internal RSSI blocks are measuring the amplitude of the subcarrier signal; the External RSSI block measures the amplitude of the RF carrier signal at the receiver input.
  • Page 26 RX_IN1 input and the 3-bit code is shown in Figure 6-6. RF Input Voltage Level at RF_IN1 in mV Figure 6-6. Digital External RSSI Value vs RF Input Level in V (mV) Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...

  • Page 27: Oscillator Section

    A 27-pF capacitor must be placed on pins 30 and 31 to ensure proper crystal oscillator operation. TRF7970A Pin 30 Pin 31 Crystal Figure 6-7. Crystal Block Diagram Any crystal used with TRF7970A should have minimum characteristics shown in Table 6-9. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback...

  • Page 28: Transmitter - Analog Section

    The digital part of the transmitter is a mirror of the receiver. The settings controlled the ISO Control register (0x01) are applied to the transmitter just like the receiver. In the TRF7970A default mode the TRF7970A automatically adds these special signals: start of communication, end of communication, SOF, EOF, parity bits, and CRC bytes.

  • Page 29: Transmitter - External Power Amplifier And Subcarrier Detector

    FIFO. The transmission starts when first data byte is written into the FIFO. NOTE If the data length is longer than the FIFO, the TRF7970A notifies the external system MCU when most of the data from the FIFO has been transmitted by sending an interrupt request with a flag in the IRQ register to indicate a FIFO low or high status.

  • Page 30: Trf7970A Ic Communication Interface

    When the SPI interface is selected, the unused I/O_2, I/O_1, and I/O_0 pins must be hard-wired as shown Table 6-10. At power up, the TRF7970A samples the status of these three pins and then enters one of the possible SPI modes.
  • Page 31 The Command Mode is used to enter a command resulting in reader action (for example, initialize transmission, enable reader, and turn reader on or off). Examples of expected communications between an MCU and the TRF7970A are shown in the following sections.
  • Page 32 Figure 6-8. Continuous Address Register Write Example Starting with Register 0x00 Using SPI With SS Figure 6-9. Continuous Address Register Read Example Starting with Register 0x00 Using SPI With SS Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 33 Figure 6-10. Single Address Register Write Example of Register 0x00 Using SPI With SS Figure 6-11. Single Address Register Read Example of Register 0x00 Using SPI With SS Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 34 Cmd x (Optional data or command) Stop Figure 6-12. Direct Command Example of Sending 0x0F (Reset) Using SPI With SS The other Direct Command Codes from MCU to TRF7970A IC are described in Section 6.13. 6.10.1.4 FIFO Operation The FIFO is a 127-byte register at address 0x1F with byte storage locations 0 to 126. FIFO data is loaded...
  • Page 35 SLOS743K – AUGUST 2011 – REVISED APRIL 2014 During transmission, the MCU loads the TRF7970A IC's FIFO (or during reception the MCU removes data from the FIFO), and the FIFO counter counts the number of bytes being loaded into the FIFO. Meanwhile, the byte counter keeps track of the number of bytes being transmitted.
  • Page 36 If the reader detects a receive error, the corresponding error flag is set (framing error, CRC error) in the IRQ Status register, indicating to the MCU that reception was not completed correctly. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 37 When an SPI interface is used, I/O pins I/O_2, I/O_1, and I/O_0 must be hard wired according to Table 6- 10. On power up, the TRF7970A looks for the status of these pins and then enters into the corresponding mode.
  • Page 38 No Data Transitions (All High or Low) Ignore MISO Don’t Care SLAVE SELECT Figure 6-17. Procedure for Dummy Read Figure 6-18. Example of Dummy Read Using SPI With SS Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 39 No Data Transitions (All High or Low) No Data Transitions (All High or Low) MISO DON’T CARE SLAVE SELECT Figure 6-20. Continuous Read Operation Using SPI With Slave Select Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 40 Figure 6-22. Inventory Command Sent From MCU to TRF7970A The TRF7970A takes these bytes from the MCU and then send out Request Flags, Inventory Command ,and Mask over the air to the ISO15693 transponder. After these three bytes have been transmitted, an interrupt occurs to indicate back to the reader that the transmission has been completed.
  • Page 41 The next byte is the DSFID (usually shipped by manufacturer as 0x00), then the UID, shown here up to the next most significant byte, the MFG code (shown as 0x07 (TI silicon)). Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 42 At this point, it is good form to reset the FIFO and then read out the RSSI value of the tag. In this case the transponder is very close to the antenna, so value of 0x7F is recovered. Figure 6-26. Reset FIFO and Read RSSI Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 43 ISO standard communications, then deviated from the standard after being identified and selected, the ability to go into Direct Mode 0 becomes very useful. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 44 Step 1: Configure Pins I/O_0 to I/O_2 for SPI with SS Step 2: Set Pin 12 of the TRF7970A (ASK/OOK pin) to 0 for ASK or 1 for OOK Step 3: Program the TRF7970A registers The following registers need to be explicitly set before going into the Direct Mode.
  • Page 45 3. Set bit B6 of the Chip Status Control register (0x00) to 1 to enter Direct Mode 4. Send extra eight clock cycles (see Figure 6-28, this step is TRF7970A specific) NOTE – It is important that the last write is not terminated with a stop condition. For SPI, this means that Slave Select (I/O_4) stays low.
  • Page 46 The receive data bytes must be buffered locally. As an example of the receive data bits and framing level according to the ISO14443A standard is shown Figure 6-31 (taken from ISO14443 specification and TRF7970A air interface). Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated...
  • Page 47 I/O_6 line during the RX process while in Direct Mode 0. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...

  • Page 48: Special Direct Mode For Improved Mifare™ Compatibility

    Step 7: Terminating Direct Mode 0 After the EOF is received, data transmission is over, and Direct Mode 0 can be terminated by sending a Stop Condition (in the case of SPI, make the Slave Select go high). The TRF7970A is returned to default state.
  • Page 49 The first reader command was of ISO14443B type Nfcbr1 00 = N/A 01 = 106 kbps Bit rate of first received command 10 = 212 kbps Nfcbr0 11 = 424 kbps Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 50 No-response Wait Time register (0x07). Signals the MCU that next slot command can be sent. Only for ISO15693. (1) Displays the cause of IRQ and TX/RX status Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...

  • Page 51: Direct Commands From Mcu To Reader

    Adr 3 Cmd 3 Address/Command bit 2 Adr 2 Cmd 2 Address/Command bit 1 Adr 1 Cmd 1 Address/Command bit 0 Adr 0 Cmd 0 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 52 NFC Target Detection Level 0x00 0x19 NFC Target Protocol 0x00 0x1A Test 0x00 0x1B Test 0x00 0x1C FIFO status 0x00 (1) Differs from default at POR Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 53 SOF signal, and if the noise pattern matched the SOF pattern, an interrupt would be generated, falsely signaling the start of an RX operation. A constant flow of interrupt requests can be a problem for Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 54 Tag communication for the Check RF command to work properly. Table 6-23. Test External RF Peak Level to RSSI Codes RF_IN1 [mV Decimal Code Binary Code Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...

  • Page 55: Register Description

    Adjustable FIFO IRQ Levels Register 0x15 Reserved 0x16 NFC Low Field Detection Level 0x17 NFCID1 Number (up to 10 bytes wide) 0x18 NFC Target Detection Level Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 56 Test Register. Preset 0x00 0x1B Test Register. Preset 0x00 FIFO Registers 0x1C FIFO status 0x1D TX length byte 1 0x1E TX length byte 2 0x1F FIFO I/O register Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 57 0 = target 1 = initiator NFC: iso_3 RFID / NFC Mode 0 = passive mode 1 = active mode (1) Only applicable to ISO-14443A and ISO-15693 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 58 NFC Mode (B5 = 1, B2 = 0) or Card Emulation (B5 = 1, B2 = 1) Card Emulation ISO_1 ISO_0 (B5 = 1, B2 = 0) (B5 = 1, B2 = 1) ISO14443A 106 kbps ISO14443B 212 kbps 424 kbps Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 59 TX For 14443A high bit rate, coding and decoding 1 = parity odd except last parity-2rx byte which is even for RX Unused Unused Unused Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 60 Timer Length All bits low = timer disabled (0x00) tm_length2 Timer Length tm_length1 Timer Length Preset 0x00 for all other protocols tm_length0 Timer Length LSB Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 61 604 µs → Reserved 755 µs → ISO15693 high data rate (TI Tag-It HF-I) NoResp0 No response LSB 1812 µs → ISO15693 low data rate (TI Tag-It HF-I) Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 62 Rxw3 9.44 µs → FeliCa Rxw2 66 µs → ISO14443A and B Rxw1 180 µs → Reserved Rxw0 293 µs → ISO15693 (TI Tag-It HF-I) Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 63 The frequency of SYS_CLK (pin 27) is programmable by the bits B4 and B5 of this register. The frequency of the TRF7970A system clock oscillator is divided by 1, 2 or 4 resulting in available SYS_CLK frequencies of 13.56 MHz or 6.78 MHz or 3.39 MHz.
  • Page 64 The setting of bits B4, B5, B6 and B7 to zero selects bandpass characteristic of 240 kHz to 1.4 MHz. This is appropriate for ISO14443B, FeliCa protocol, and ISO14443A higher bit rates 212 kbps and 424 kbps. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 65 DD_X = 2.8 V, V and V = 2.8 V DD_RF DD_A DD_X = 2.7 V, V and V = 2.7 V DD_RF DD_A DD_X Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 66 Table 6-43. IRQ Status Register (0x0C) Function: Information available about TRF7970A IRQ and TX/RX status Default: 0x00 at POR = H or EN = L, and at each write to the ISO Control Register 0x01. It is also automatically reset at the end of a read phase.
  • Page 67 Table 6-44. IRQ Status Register (0x0C) for NFC and Card Emulation Operation Function: Information available about TRF7970A IRQ and TX/RX status Default: 0x00 at POR = H or EN = L, and at each write to the ISO Control Register 0x01. It is also automatically reset at the end of a read phase.
  • Page 68 0 = 7 subcarrier pulses Selects the number of subcarrier pulses that trigger collision error in the col_7_6 1 = 6 subcarrier pulses 14443A - 106 kbps Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 69 Hash4 Hash3 Rfdet_I2 RF field level for RF Comparator output is displayed in B6 of the NFC Target Protocol register Rfdet_I1 collision avoidance (0x19) Rfdet_I0 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 70 SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 6.14.3.3.8 NFCID1 Number Register (0x17) This register is used to hold the ID of the TRF7970A for use during card emulation and NFC peer-to-peer target operations. The procedure for writing the ID into register 0x17 is the following: 1.
  • Page 71 Initiator/Reader is presented. An example use of this scenario would be when the TRF7970A is placed into card emulation (Type A or Type B) and another TRF7970A or NFC device (polling for other NFC devices) is presented to the TRF7970A in card emulation mode. The IRQ indicates that a field was detected (IRQ Status = 0x04) or that Auto SDD has completed (IRQ Status = 0x08, if configured for AutoSDD).
  • Page 72 Description test_rf_level RF level test test_io1 I/O test Not implemented test_io0 test_dec Decoder test mode clock_su Coder clock 13.56 MHz For faster test of coders Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 73 Bits B0:B6 indicate how many bytes that are in the FIFO to be read out (= N number of bytes, in hex) FIFO bytes fb[1] FIFO bytes fb[0] Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 74 It is taken into account only when broken byte flag is set. Broken byte number of bits bb[0] Broken byte flag B0 = 1, indicates that last byte is not complete 8 bits wide. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...

  • Page 75: Application Schematic And Layout Considerations

    TRF7970A application schematic. Both ISO15693, ISO14443 and FeliCa systems can be addressed. Due to the low clock frequency on the DATA_CLK line, the parallel interface is the most robust way to connect the TRF7970A with the MCU. Figure 7-1 shows matching to a 50-Ω...

  • Page 76: Trf7970A Reader System Using Spi With Ss Mode

    7.2.1 General Application Considerations Figure 7-2 shows the TRF7970A application schematic optimized for both ISO15693 and ISO14443 systems using the Serial Port Interface (SPI). Short SPI lines, proper isolation of radio frequency lines, and a proper ground area are essential to avoid interference. The recommended clock frequency on the DATA_CLK line is 2 MHz.

  • Page 77: Layout Considerations

    Impedance Matching TX_Out (Pin 5) to 50 Ω The output impedance of the TRF7970A when operated at full power out setting is nominally 4 + j0 (4 Ω real). This impedance must be matched to a resonant circuit and TI recommends matching circuit from 4 Ω...
  • Page 78 SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Figure 7-3. Impedance Matching Circuit This yields the Smith Chart Simulation shown in Figure 7-4. Figure 7-4. Smith Chart Simulation Application Schematic and Layout Considerations Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...

  • Page 79: Reader Antenna Design Guidelines

    Table 6-25. Reader Antenna Design Guidelines For HF antenna design considerations using the TRF7970A, see these documents: • Antenna Matching for the TRF7960 RFID Reader (SLOA135) • TRF7960TB HF RFID Reader Module User's Guide (SLOU297) Application Schematic and Layout Considerations Copyright ©...

  • Page 80: Device And Documentation Support

    All other trademarks are the property of their respective owners. Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
  • Page 81 PACKAGE OPTION ADDENDUM www.ti.com 4-Apr-2014 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples Drawing (4/5) TRF7970ARHBR ACTIVE VQFN 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR &...
  • Page 82 PACKAGE OPTION ADDENDUM www.ti.com 4-Apr-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2...
  • Page 83 PACKAGE MATERIALS INFORMATION www.ti.com 15-Jan-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) TRF7970ARHBR VQFN 3000 330.0 12.4 12.0 TRF7970ARHBT VQFN 180.0 12.4...
  • Page 84 PACKAGE MATERIALS INFORMATION www.ti.com 15-Jan-2015 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) TRF7970ARHBR VQFN 3000 367.0 367.0 35.0 TRF7970ARHBT VQFN 210.0 185.0 35.0 Pack Materials-Page 2...
  • Page 88 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.

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