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Chapter 5
Figure 13
16 Pos
Term Block
8 Thermocouple
or Differential
Voltage Inputs
58
shows a block diagram of the DT9828 module.
Isolated Power
MUX
8:1 Differential
Break Detection
on each channel
FPGA
CJ Sensor
Figure 13: Block Diagram of the DT9828 Module
+/- 500 V
Isolation Barrier
5 V DC
DC/DC
USB
FPGA
24-Bit
ADC
Delta-Sigma
Controls
ADC
MUX
Controls
Digital In
(Opto Coupled)
x 4
12 Pos
Term Block
4
Digital
Digital
Inputs
Outputs
Status LED
EEPROM
Bus
USB
Interface
High Speed
and
Interface
Control
Registers
Digital Out
(Opto Coupled)
x 4
Digital Output Return
4
Digital Output Supply
USB 2.0
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