Summary of Contents for Texas Instruments SRC4194EVM
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SRC4194EVM Evaluation Module User’s Guide July 2004 SBAU096...
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TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:...
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EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods.
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EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2004, Texas Instruments Incorporated...
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About This Manual This document contains the information required to setup and operate the SRC4194EVM evaluation module. For a more detailed description of the SRC4194, please refer to the product datasheet available from the Texas In- struments web site at http://www.ti.com. Additional support documents are listed in the sections of this guide entitled Related Documentation from Tex- as Instruments and Additional Documentation.
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Contents Information About Cautions This document contains cautions. The information in a caution is provided for your protection. Please read each caution carefully. This is an example of a caution statement. A caution statement describes a situation that could potentially damage your software or equipment.
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User’s Guide. Newer revisions may be available from the TI web site, or by calling the Texas Instruments Literature Response Center at (800) 477−8924 or the Product Information Center at (972) 644−5580.
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If you have questions regarding either the use of this evaluation module or the information contained in the accompanying documentation, please contact the Texas Instruments Product Information Center at (972) 644−5580 or visit the TI Semiconductor Online Technical Support pages at http://www.ti.com.
Chapter 1 Introduction This chapter provides a brief technical overview for the SRC4194 four-channel audio asynchronous sample rate converter, as well as a general description and feature list for the SRC4194EVM. Topic Page SRC4194 Product Overview ........
SRC4194 Product Overview 1.1 SRC4194 Product Overview The SRC4194 is a four-channel, asynchronous sample rate converter (ASRC), implemented as two stereo sections referred to as SRC A and SRC B. Operation at input and output sampling frequencies up to 212kHz is supported, with a continuous input/output sampling ratio range of 16:1 to 1:16.
SRC4194 Functional Block Diagram 1.2 SRC4194 Functional Block Diagram Figure 1−1 shows a functional block diagram of the SRC4194. The SRC4194 is segmented into two stereo SRC sections referred to as SRC A and SRC B. Each section can operate independently from the other. Each section has its own set of configuration pins in Hardware mode, and its own bank of control and status registers in Software mode.
SRC4194EVM Features 1.3 SRC4194EVM Features The SRC4194EVM provides a convenient platform for evaluating the perfor- mance and functionality of the SRC4194 product. Key EVM features include: Supports operation from a single +5V power supply Flexible power-supply configuration using either onboard voltage regula-...
SRC4194EVM Functional Block Diagram 1.4 SRC4194EVM Functional Block Diagram The SRC4194EVM functional block diagram is shown in Figure 1−2. Besides the SRC4194, there are multiple audio input and output port interfaces, refer- ence clock generation circuitry, switches for Hardware mode configuration and logic functions, and a buffered host port interface for communications with the SRC4194 SPI port when configured for Software mode operation.
Chapter 2 Getting Started This chapter provides information regarding SRC4194EVM handling and unpacking, as well as absolute operating conditions. Topic Page Electrostatic Discharge Warning .......
Failure to observe proper ESD handling precautions may result in damage to EVM components. Many of the components on the SRC4194EVM are susceptible to damage by electrostatic discharge (ESD). Customers are advised to observe proper ESD handling procedures when unpacking and handling the EVM, including the use of a grounded wrist strap at an approved ESD workstation.
Unpacking the EVM 2.2 Unpacking the EVM Upon opening the SRC4194EVM package, please check to make sure that the following items are included: One SRC4194EVM One printed copy of the SRC4194 data sheet One printed copy of the SRC4194EVM User’s Guide If any of these items are missing, please contact the Texas Instruments Prod- uct Information Center nearest you to inquire about replacements.
The user should be aware of the absolute operating conditions for the SRC4194EVM. Exceeding these conditions may result in damage to the EVM and possibly the equipment connected to it. Table 2−1 summarizes the critical data points.
Chapter 3 Hardware Description and Configuration This chapter provides hardware description and configuration information for the SRC4194EVM. Topic Page Power Supply Configuration ........
J14. Table 3−1 summarizes five common supply configurations for the SRC4194EVM. Jumper settings for J15 through J17 are indicated, as well as the state of the REGEN element of switch SW2. The user is reminded to power down all supplies connected to terminal block J14 of the EVM before changing the jumper and switch configurations.
Power Supply Configuration Table 3−1. Common Configurations using a +5V Supply and an Optional EXT VIO Supply REGEN Case Description (SW2) Core Voltage = +1.8V — REG + 1.8V using onboard regulator (U33) VIO = +1.8V REG + 1.8V using onboard regulator (U33) Core Voltage = +1.8V —...
SRC4194 Configuration Modes 3.2 SRC4194 Configuration Modes The SRC4194 can be set to one of two configuration modes: Hardware (or Standalone) or Software (via a four-wire SPI port). The H/S element of switch SW2 is used to set the mode. Table 3−2 summarizes the H/S mode switch set- tings.
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SRC4194 Configuration Modes Hardware Description and Configuration...
3.2.2 SRC4194 Software Mode Configuration Via The Host Port In Software mode, the SRC4194 relies upon an external host device to pro- gram the internal control registers via the four-wire SPI port. The SPI port is accessed using the Host Port header, connector J1. The header is buffered by U2, an octal buffer IC with tri-state outputs.
Audio Input Ports 3.3 Audio Input Ports The SRC4192EVM includes four audio input ports, two each for the SRC A and SRC B sections of the SRC4194. Each section is provided with an AES3/SPDIF-compatible input, along with a buffered I/O header. Figure 3−2 illustrates the input port external connections and associated switch settings.
Audio Output Ports 3.4 Audio Output Ports The SRC4192EVM includes four audio output ports, two each for the SRC A and SRC B sections of the SRC4194. Each section is provided with an AES3/SPDIF-compatible output, along with a buffered I/O header. Figure 3−3 illustrates the output port external connections and associated switch settings.
Audio Output Ports The DIT4192 transmitters (U7 and U17) have additional configuration switches, summarized in Table 3−4 and Table 3−5. For the clock divider, the corresponding control pins need to be set dependent upon the incoming mas- ter clock (MCLK) and output sampling rates, f .
Reference Clock Generation 3.5 Reference Clock Generation The SRC4194EVM supports a flexible configuration for the SRC4194 refer- ence clock generation. Figure 3−4 illustrates the PLL and clock connections used for the reference clocks. Both SRC A and SRC B have their own reference clocks, referred to as RCKIA and RCKIB, respectively.
TDM Test Mode 3.6 TDM Test Mode Jumper J18 is provided to allow a simple onboard connection between SDOUTA (pin 64) and TDMIB (pin 52). This provides a test mode for evaluating the TDM output data format. When J18 is shorted, the TDMIB pin at header J7 should be floating, with no external connection.
Chapter 4 Schematic, PCB Layout, and Bill of Materials This chapter provides the electrical schematic and physical layout information for the SRC4194EVM. The bill of materials is included for component and manufacturer reference. Topic Page Schematic ........... .
Schematic 4.1 Schematic The electrical schematic for the SRC4194EVM is shown in Figure 4−1 and Figure 4−2. Descriptions of the components shown on the schematics are listed in Table 4−1.
PCB Layout 4.2 PCB Layout The SRC4194EVM is a four-layer printed circuit board (PCB) with the following layer structure: Layer 1: Top (Component Side) Layer 2: Ground Plane Layer 3: Power Layer 4: Bottom (Solder Side) Figure 4−3 through Figure 4−8 show the top side silk screen, along with the top, ground plane, power, and bottom layers of the printed circuit assembly.
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