Texas Instruments AM62-SIP SK Series User Manual

Texas Instruments AM62-SIP SK Series User Manual

Evaluation module

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EVM User's Guide: SK-AM62-SIP
AM62x-SIP SK Evaluation Module
Description
The SK-AM62-SIP starter kit (SK) evaluation module
(EVM) is a stand-alone test and development platform
built around the AM6254 system-on-a-chip (SoC)
with integrated 512MB LPDDR4 SDRAM in a single
package. AM625SIP processors are comprised of a
®
quad-core 64-bit Arm
-Cortex
and single-core Arm Cortex-M4F MCU.
SK-AM62-SIP allows the user to experience a dual-
display feature with 3D GPU through high-definition
multimedia interface (HDMI) over dots per inch (DPI)
and low-voltage differential signaling (LVDS), as well
as industrial communication applications using serial,
Ethernet, USB and other interfaces.
SPRUJA1 – OCTOBER 2023
Submit Document Feedback
®
-A53 microprocessor
Copyright © 2023 Texas Instruments Incorporated
Get Started
1. Order the EVM at SK-AM62-SIP.
2. Download the EVM
design
3. Download the reference software for many
applications from
AM62x Development
4. The EVM Users Guide is here.
Features
USB-C powered standalone mode of operation
Power optimized discrete DC-DC power
management
Onboard XDS110 JTAG interface with USB
connectivity for code development and debugging
Onboard 32 GB eMMC memory and 512 Mb OSPI
NOR Flash
2x RGMII RJ45 connectors
2x USB 2.0 on type A and type C connectors
Test automation interface through XDS110
Expansion econnectors to access the interfaces
M.2 connector for Wi-Fi/BT module
Description
files.
Portal.
AM62x-SIP SK Evaluation Module
1

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Summary of Contents for Texas Instruments AM62-SIP SK Series

  • Page 1 2x USB 2.0 on type A and type C connectors • Test automation interface through XDS110 • Expansion econnectors to access the interfaces • M.2 connector for Wi-Fi/BT module SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 2: Kit Contents

    The figure below shows the functional block diagram of the AM62x SIP SK EVM. Figure 1-1. Functional Block Diagram of AM62x SIP SK EVM AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 3: Device Information

    The embedded emulation logic allows for emulation and debugging using standard development tools such as the Code Composer Studio ™ integrated development environment (IDE) (CCSTUDIO). Reference software for many applications can be downloaded from AM62x Development Portal. SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 4 2.1 Additional Images This section shows the EVM pictures and the location of various blocks on the board. Figure 2-1. EVM Top Side AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 5: Key Features

    512Kbit Inter-Integrated Circuit (I2C) board ID EEPROM • 32GBeMMC Flash with HS-400 support 2.2.4 JTAG/Emulator • XDS110 On-Board Emulator • Supports20-pin JTAG connection from external emulator SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 6: Interface Mapping

    MCU_UART0 Test Automation Header SoC_I2C1 FH12A-40S-0.5SH Temperature Sensor SoC_I2C1 TMP100NA/3K Current Monitors SoC_I2C1 INA231AIYFDR Connectivity– M.2 Key E MMC2, McASP1 and SoC_UART1 2199119-4 AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 7: Power On/Off Procedure

    Figure 2-3. SD Boot Mode Switch Setting Example 2.4.2 Power OFF Procedure 1. Disconnect AC power from AC/DC converter. 2. Remove the USB Type-C cable from the SK EVM. SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 8 3.3V VCC_3V3_FT4232 C482.1 3.3V 2.5 Clocking The figure below shows the clocking architecture of the AM62x SIP SK EVM. Figure 2-4. Clock Architecture AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 9 User Expansion Connector on the SKEVM. The 32.768 KHz clock to the M.2 module is provided by WKUP_CLKOUT0 of AM62x SIP SoC through a voltage translational buffer. SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 10 MCU_RESETSTATz is the MCU domain warm reset status output Upon Power on Reset, all peripheral devices connected to the main domain get reset by RESETSTATz. Figure 2-6. Reset Architecture AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 11: Csi Interface

    Figure 2-7. CSI Interface Table 2-4. CSI Camera Connector J19 Pinout Pin No. Pin Description CSI0_RXN0 CSI0_RXP0 CSI0_RXN1 CSI0_RXP1 CSI0_RXCLKN CSI0_RXCLKP CSI_GPIO1 CSI_GPIO2 CSI_I2C2_SCL CSI_I2C2_SDA VCC_3V3_SYS SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 12: Audio Codec Interface

    TheTLV320AIC3106 is powered by an analog supply of 3.3 V, a digital core supply of 1.8 V, and a digital I/O supply 3.3 V. Figure 2-8. Audio Codec Interface AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 13 The HDMI Framer is powered using 3.3 V Board IO Supply and 1.2 V by a dedicated LDO Mfr Part#- TLV75512PDQNR. Figure 2-9. HDMI Interface SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 14: Jtag Interface

    ESD pulses up to ±15-kV Human-Body Model (HBM) as specified in IEC 61000-4-2 and provides ±8-kV contact discharge and ±12- kV air-gap discharge. AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 15 Table 2-5. JTAG Connector (J17) Pin-Out Pin No. Signal JTAG_TMS JTAG_TRST# JTAG_TDI JTAG_TDIS VCC3V3_SYS JTAG_TDO SEL_XDS110_INV JTAG_cTI_RTCK DGND JTAG_cTI_TCK DGND JTAG_EMU0 JTAG_EMU1 JTAG_EMU_RSTn DGND DGND SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 16 SoC and WARM_RESETn for warm reset of the SoC. One Interrupt signal from the Test Automation header is routed to the SoC GPIO (GPIO1_23) to provide an external Interrupt. Figure 2-11. Test Automation AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 17 Input TEST_GPIO1 Bidirectional TEST_GPIO2 Bidirectional TEST_GPIO3 Input TEST_GPIO4 Input DGND Power DGND Power SoC_I2C1_TA_SCL Bidirectional BOOTMODE_I2C_S Bidirectional SoC_I2C1_TA_SDA Bidirectional BOOTMODE_I2C_S Bidirectional DGND Power SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 18: Uart Interface

    COM port with board serial number when one or more boards are connected to the computer. Figure 2-12. UART Interface AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 19: Usb Interface

    Mfr Part# TPD3S014DBVR. This switch limits the current to 500 mA and dissipates the ESD strikes above the maximum level specified in the IEC 61000-4-2. Figure 2-13. USB 2.0 Type A Interface SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 20 DP/DM Signals. An ESD protection device of part number TPD1E01B04DPLT is included on CC signals and TVS2200DRVR IC is included on VBUS rail of Type-C Connector J13 to dissipate ESD strikes. Figure 2-14. USB 2.0 Type C Interface AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 21: Memory Interfaces

    The OSPI interface of the SoC is powered by VDDSHV1 Power group of SoC and is connected to 1.8V IO supply. Figure 2-15. OSPI Interface SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 22 MMC0 interface of the SoC is powered by the VDDSHV4 power domain, which is connected to 1.8 V IO supply. Figure 2-16. eMMC Interface AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 23 TVS diodes providing system-level IEC 61000-4-2 ESD protection, ± 8-kV contact discharge and ± 15kV air-gap discharge. Figure 2-17. Micro SD Interface SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 24 The MMC2 interface of the SoC is powered by the VDDSHV6 power domain, which is connected to 1.8 V IO supply. Figure 2-18. Wi-Fi Interface AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 25 The remaining 65277 bytes are available to the user for data or code storage. Figure 2-19. Board ID EEPROM SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 26: Ethernet Interface

    10/100/1G Connectivity. RJ45 Connectors have integrated magnetics and LEDs for indicating 1000BASE-T link as well as receive or transmit Activity. IOsupply to the Ethernet PHY is set 3.3V level. Figure 2-20. Ethernet Interface AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 27 LED2 is connected to RJ45 Left LED (Yellow) to indicate transmit/receive activity. GPIO_0 is connected to RJ45 Left LED (Green) to indicate 10/100MHz link. LED Control is achieved through an external MOSFET. SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 28 M.2 Connector SDIO Reset Control GPIO GPIO_TS_RSTn OUTPUT OLDI Display Reset control GPIO_AUD_RSTn OUTPUT Audio Codec Reset Control GPIO GPIO_eMMC_RSTn OUTPUT eMMC Reset control GPIO AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 29: Gpio Mapping

    2.17 GPIO Mapping The table below describes the detailed GPIO mapping of AM62x SIP SoC with AM62x SIP SK EVM peripherals. Figure 2-21. GPIO Mapping SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 30: Power Requirements

    J13 is UFP and can only sink power. Board is powered by the port with highest PD power Plugged in Plugged in ON- J11 or J13 contract. AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 31 VMAIN, which is given to on board Buck-Boost and Buck regulators to generate fixed 5 V and 3.3 V supply for the SK EVM board. SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 32 3.3V respectively and the input to the regulators is the PD output. These 3.3 V and 5 V are the primary voltages for the AM62x SIP SK EVM Board power resources. AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 33 TPS630702RNMR from which all other power supplies are derived. SoC has different IO groups. Each IO group is powered by specific power supplies as given in the next section. SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 34 The figure below shows the various discrete regulators and LDOs used to generate power rails and the current consumption of each peripheral on AM62x SIP SK EVM board. Figure 2-23. Power Architecture AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 35 The figure below shows the Power Up and Power Down sequence of all the AM62x SIP SK EVM Power supplies. AM62x SIP SoC Power rails are named in red. Figure 2-24. Power Up Sequence Figure 2-25. Power Down Sequence SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 36 Hardware www.ti.com Figure 2-26. Power Supply Sequencing AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 37: Current Monitoring

    0x40 1mΩ± 1% VCC_3V3_SYS SoC_DVDD3V3 0x4C 10mΩ± 1% VCC_1V8 SoC_DVDD1V8 0x45 10mΩ± 1% VDDA1V8 VDDA_1V8 0x4D 10mΩ± 1% VCC1V1_DDR VDD_DDR 0x47 10mΩ± 1% SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 38 Backup boot mode Primary boot mode Primary boot mode PLLConfiguration mode configuration configuration The table below gives details of PLL reference clock selection. AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 39 The below table provides backup boot mode selection details. Note BOOT-MODE[10:12] – Select the backup boot mode, that is, the peripheral/memory to boot from, if primary boot device failed. SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 40 Switch SW2.6 when ON sets 1 and sets 0 if OFF, see the device- specific TRM. • BOOT-MODE[14:15] – Reserved. AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 41: Expansion Headers

    AM62x SIP SK EVM features three expansion Headers, a 40 pin User expansion connector, 20 pin PRU Header and a 28 pin MCU Header. SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 42 IO expander. Signals routed from the PRU Connector are listed in the table below. Figure 2-28. PRU Header (J10) Pin-Out AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 43 PR0_PRU0_GPO3/ PR0_PRU0_GPI3/ TRC_DATA1/GPIO0_18 GPMC0_AD4/PR0_PRU1_GPO12/ PR0_PRU1_GPI12/MCASP2_AXR8/ PR0_PRU0_GPO4 PR0_PRU0_GPO4/PR0_PRU0_GPI4/ TRC_DATA2/GPIO0_19 GPMC0_AD5/PR0_PRU1_GPO13/ PR0_PRU1_GPI13/MCASP2_AXR9/ PR0_PRU0_GPO5 PR0_PRU0_GPO5/PR0_PRU0_GPI5/ TRC_DATA3/GPIO0_20 GPMC0_AD6/PR0_PRU1_GPO14/ PR0_PRU1_GPI14/MCASP2_AXR10/ PR0_PRU0_GPO6 PR0_PRU0_GPO6/PR0_PRU0_GPI6/ TRC_DATA4/GPIO0_21 GPMC0_AD7/PR0_PRU1_GPO15/ PR0_PRU1_GPI15/MCASP2_AXR11/ PR0_PRU0_GPO7 PR0_PRU0_GPO7/ PR0_PRU0_GPI7/ TRC_DATA5/GPIO0_22 SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 44 I2C based GPIO Port expander. Signals routed from User Expansion connector are listed in the table below. Figure 2-29. Expansion Connector AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 45 EXP_GPIO0_32 MCASP1_AXR2/ PR0_PRU0_GPO9/ PR0_PRU0_GPI9/ TRC_DATA7/ GPIO0_32 EXP_GPIO0_38 GPMC0_WAIT1/ VOUT0_EXTPCLKIN/ GPMC0_A21/ UART6_RXD/ GPIO0_38/ EQEP2_I VCC3V3_EXP GPMC0_WPn/ EXP_GPIO0_39 AUDIO_EXT_REFCLK1/ GPMC0_A22/ UART6_TXD/ PR0_PRU0_GPO15/ PR0_PRU0_GPI15/ TRC_DATA13/ GPIO0_39 SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 46 MCASP2_AXR12/ PR0_PRU0_GPO13/ PR0_PRU0_GPI13/ TRC_DATA11/ GPIO0_36 DGND GPMC0_OEn_REn/ EXP_GPIO0_33 MCASP1_AXR1/ PR0_PRU0_GPO10/ PR0_PRU0_GPI10/ TRC_DATA8/ GPIO0_33 GPMC0_DIR/ EXP_GPIO0_40/ PR0_ECAP0_IN_APWM_OUT/ PR0_ECAP0_IN_APWM_OUT MCASP2_AXR13/ PR0_PRU0_GPO16/ PR0_PRU0_GPI16/ TRC_DATA14/ GPIO0_40/ EQEP2_S AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 47 GPMC0_CSn0/ EXP_GPIO0_41 MCASP2_AXR14/ PR0_PRU0_GPO17/ PR0_PRU0_GPI17/ TRC_DATA15/ GPIO0_41 MCASP0_AXR3/ SPI2_D0/ EXP_SPI2_D0 UART1_CTSn/UART6_RXD/ PR0_IEP0_EDIO_DATA_IN_OUT 28/ ECAP1_IN_APWM_OUT/ PR0_UART0_RXDGPIO1_7 EQEP0_A EXP_HAT_DETECT EXP_SPI2_CLK MCASP0_ACLKR/SPI2_CLK/ UART1_TXD/ EHRPWM0_B/ GPIO1_14/ EQEP1_I SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 48 Pin Multiplexed Signal VCC_3V3_SYS DGND MCU_SPI0_D1 MCU_SPI0_D1/MCU_GPIO0_4 MCU_SPI0_D0 MCU_SPI0_D0/MCU_GPIO0_3 DGND MCU_SPI0_CS1/ MCU_SPI0_CS1 MCU_OBSCLK0/ MCU_SYSCLKOUT0/ MCU_EXT_REFCLK0/ MCU_TIMER_IO1/ MCU_GPIO0_1 MCU_GPIO0_15 MCU_MCAN1_TX/ MCU_TIMER_IO2/ MCU_SPI1_CS1/ MCU_EXT_REFCLK0/ MCU_GPIO0_15 AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 49 Top side of the Board and are listed in below table. Table 2-23. EVM Push Buttons SL. Number Push Buttons Signal Function SoC_WARM_RESETZ Main domain Warm Reset input GPIO_INT_SoC Generates interrupt on GPIO1_23 SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 50: I2C Address Mapping

    <connector interface> The image below depicts the I2C tree, and above table provides the complete I2C address mapping details on AM62x SIP SK EVM. AM62x-SIP SK Evaluation Module SPRUJA1 – OCTOBER 2023 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 51 Hardware Figure 2-31. I2C Interface SPRUJA1 – OCTOBER 2023 AM62x-SIP SK Evaluation Module Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 52: Additional Information

    EN IEC 61326-1:2021. 5 Additional Information 5.1 Trademarks Code Composer Studio ™ is a trademark of Texas Instruments. ® and Cortex ® are registered trademarks of Arm Limited. All trademarks are the property of their respective owners.
  • Page 53 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
  • Page 54 www.ti.com Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product.
  • Page 55 www.ti.com Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à...
  • Page 56 www.ti.com EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices.
  • Page 57 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2023, Texas Instruments Incorporated...
  • Page 58 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2023, Texas Instruments Incorporated...

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