Zynq UltraScale+ User Manual page 6

This user guide describes the architecture of the design and provides a functional
description of its components. It is organized as follows:
Chapter 1, Introduction
UltraScale+ RFSoC device architecture, the design architecture, and a summary of key
features.
Chapter 2, Package Details
components that make up this design.
Chapter 3, Hardware Design
key PS and PL peripherals.
Chapter 4, Clocking
Chapter 5, Evaluation Tool System Configuration using the GUI
system configuration and features supported using the GUI.
Chapter 6, Software Architecture
software platform including the Linux software stack and the Linux rftool application
running on the APU.
Chapter 7, Protocol Specification
the host and RFSoC.
Chapter 8, Zynq UltraScale+ RFSoC Data Converter Bare-metal/Linux Driver
where to get more information about the driver.
Chapter 9, System Considerations
including boot flow and the system address map.
Appendix A, Reference Design Protocol Specification
the software design.
Appendix B, Additional Resources and Legal Notices
references.
RFSoC Data Converter Evaluation Tool User Guide
UG1287 (v2018.2) October 1, 2018
(this chapter) provides a high-level overview of the Zynq
gives an overview of the design modules and design
describes the hardware platform of the design including
describes the details on clocking used for the design.
describes the application processor unit (APU)
describes the protocol used to communicate between
describes system architecture considerations
www.xilinx.com
Chapter 1: Introduction
describes the details of
describes the commands used in
lists additional resources and
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describes
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