Revision History - Zynq UltraScale+ User Manual

Revision History

The following table shows the revision history for this document.
Section
DAC Data Flow
Streaming MUX
GPIO Selection
Application Flow
DAC Flow for PL DDR
Example Commands and Responses
Initial Xilinx release
RFSoC Data Converter Evaluation Tool User Guide
UG1287 (v2018.2) October 1, 2018
10/01/2018 Version 2018.2
Added information about feeding data to the RF-DAC.
Added channel control selection information.
Replaced Table
Added DDR and BRAM selection information and
information to start DMA.
Added this section.
Added commands to
08/14/2018 Version 2018.2
N/A
www.xilinx.com
Revision Summary
3-2.
Table A-1.
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