JHCTech FEBC-3158 User Manual page 41

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Active LFP
Panel Color Depth
>DMI Configuration
>NB PCIe Configuration
PEG0
PEG0 – Gen X
PEG0 – ASPM
Enable PEG
Detect Non-Compliance Device
De-emphasis Control
PEG Sampler Calibrate [Auto]
Swing Control
Gen3 Equalization
Gen3 Eq Phase 2
PEG Gen3 Root Port Preset Value for each Lane
PEG Gen3 Endpoint Preset Value for each Lane
PEG Gen3 Endpoint Hint Value for each Lane
Gen3 Eq Preset Search [Disabled]
PEG Link Disabled
Fast PEG Init
RxCEM Loop back
PCIe Gen3 RxCTLEp Setting
>Memory Configuration
Memory RC Version 1.2.2.0
Memory Frequency
Total Memory
DIMM#0
DIMM#2
CAS Latency (tCL)
Minimum delay time
CAS to RAS (tRPmin) 9
[Int-LVDS]
[No LVDS]
[SDVO LVDS]
[eDP Port-A]
[eDP Port-D]
[24 Bit]
[18 Bit]
[Not Present]
[Auto]
[Gen1]
[Gen2]
[Gen3]
[Auto]
[Disabled]
[ASPM Los]
[ASPM L1]
[ASPM LosL1]
[Auto]
[Disabled]
[-3.5 dB]
[-6 dB]
[Full]
[Enabled]
[Auto]
[Disabled]
[Enabled]
[Disabled]
1333 Mhz
2048 MB (DDR3)
2048 MB (DDR3)
Not Present
9
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User's Manual

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