J2, Doutx Header; J5 Configuration: Power-Supply Input - Texas Instruments ADS1x7xEVM-PDK User Manual

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Some pins on J5 have weak pull-up/down resistors. These resistors provide default settings for many of
the control pins. Many pins on J5 correspond directly to ADS1278 pins. See the
sheet
for complete details on these pins.
5.5.3
Data Output Signals
5.5.3.1
DOUT on Digital Interface J4
In TDM mode, the data from all eight channels can be observed on the DOUT1 pin of the converter. The
DOUT1 signal is used by the ADS1x7xEVM-PDK to read back and display all the channels. The digital
data output pin on the digital interface header J4 is connected to DOUT1 signal via a D flip-flop. The D
flip-flop provides a half cycle delay in order to align the data correctly to reach the higher speeds of the
device. Otherwise, the propagation delay from the MSB in Frame Sync mode may result in missing the
MSB out of the data word.
5.5.3.2
DOUTx Header, J2
All the data output signals (DOUT1 to DOUT8) can be monitored on J2.
J2.
Data Out Line
DOUT1
DOUT3
DOUT5
DOUT7
(1)
Pin 1 is top right-hand corner, located next to reference designator.
5.6
Power Supply Header, J5
J5 is the power-supply input connector.
3.3V, and 5.0V are required for operation of the EVM. When using the EVM as part of the EVM-PDK,
these voltages are generated by the MMB0 and no external supplies are required. For operation as a
stand-alone EVM, the power supplies should be connected as shown below.
Function
Not used for this design
+5V analog supply
Digital ground
1.8V digital supply
3.3V digital supply
(1)
Pin 1 is bottom left-hand corner, located next to reference designator.
NOTE: For monitoring the current from each supply, CM1, CM2, and CM3 (0Ω resistors) can be
removed and replaced with sense resistors or ammeters.
The ADS1278 digital supplies are connected as follows:
IOVDD supply is connected to the +1.8VD pin of the J3 header.
DVDD supply is connected to the +3.3VD pin of the J3 header.
The ADS1278 analog supply, AVDD, is connected to the +5VA pin of the J5 header.
SBAU197A – February 2012 – Revised January 2016
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Table 9. J2, DOUTx Header
Pin Number
(1)
1
3
5
7
Table 10
lists the configuration details for J5. Supplies of 1.8V,
Table 10. J5 Configuration: Power-Supply Input
Pin Number
Pin Name
(J5)
(1)
Not used
1
+5VA
3
DGND
5
+1.8VD
7
+3.3VD
9
Copyright © 2012–2016, Texas Instruments Incorporated
ADS1278EVM Hardware Details
Table 9
2
4
6
8
Pin Name
Function
2
Not used
Not used for this design
4
Not used
Not used for this design
6
AGND
Analog ground input
8
Not used
Not used for this design
10
N/A
Do not use
ADS1278 product data
illustrates the pinout for
Data Out Line
DOUT2
DOUT4
DOUT6
DOUT8
15
ADS1x7xEVM-PDK

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