Texas Instruments ISO5852SDWEVM-017 User Manual
Texas Instruments ISO5852SDWEVM-017 User Manual

Texas Instruments ISO5852SDWEVM-017 User Manual

Iso5852sdw driving and protecting sic and igbt power modules

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ISO5852SDW Driving and Protecting SiC and IGBT Power
This user's guide describes the characteristics, operation, and use of the ISO5852SDWEVM-017
Evaluation Module (EVM). This TI EVM provides driving and protection for popular Silicon Carbide (SiC)
MOSFET and Si IGBT Power Modulues. A complete schematic diagram, printed-circuit board layouts, and
bill of materials are included in this document.
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SLLU298 - May 2018
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Copyright © 2018, Texas Instruments Incorporated
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List of Tables
ISO5852SDW Driving and Protecting SiC and IGBT Power Modules
User's Guide
SLLU298 - May 2018
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Summary of Contents for Texas Instruments ISO5852SDWEVM-017

  • Page 1: Table Of Contents

    ISO5852SDW Driving and Protecting SiC and IGBT Power Modules This user's guide describes the characteristics, operation, and use of the ISO5852SDWEVM-017 Evaluation Module (EVM). This TI EVM provides driving and protection for popular Silicon Carbide (SiC) MOSFET and Si IGBT Power Modulues. A complete schematic diagram, printed-circuit board layouts, and bill of materials are included in this document.
  • Page 2: Sllu298 – May

    Input Bus Voltage Sense Amplifier Outputs ......................Bill of Materials Trademarks All trademarks are the property of their respective owners. ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 3: Overview

    Overview www.ti.com Overview The ISO5852SDWEVM-017 is a compact, dual channel isolated gate driver board providing drive, bias voltages, protection and diagnostic needed for half-bridge SiC MOSFET and Si IGBT Power Modules housed in 150-mm × 62-mm × 17-mm packages. This TI EVM is based on 5.7-kVrms reinforced isolation driver IC ISO5852SDW in SOIC-16DW package with 8.0 mm creepage and clearance.
  • Page 4: Description

    Overview www.ti.com Description Compact driver board ISO5852SDWEVM-017 supports SiC power modules by reducing parasitics, minimizing switching loss and EMI and providing full required protection and diagnostics features. 1.3.1 Specification Electrical parameters of the board are shown in Table Table 1. Electrical Specifications...
  • Page 5 Reinforced, 60s kVrms Barrier capacitance Operating Ambient Temperature SIZE Board size Without connector 100 x 62 x 6.6 SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 6: Iso5852Sdwevm-017 Evm Block Diagram

    Overview www.ti.com 1.3.2 Block Diagram The ISO5852SDWEVM-017 board block diagram is shown in Figure Reinforced Isolation AMC1301 BUS_P BUS_N DC-DC +15 V Vdrp1 VCC_5V Vdrn1 Vdrp1 ±5 V UVLO1 UVLO2 500 µA DESAT IN± Mute INU+ GND2 Gate Drive OUTH...
  • Page 7 Can be set for driver outputs overlapping prevention mode by having shunt resistors R48 and R52 in place. To allow outputs overlapping simply remove shunt resistors R48 and R52. SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 8: Iso5852Sdwevm-017 Top View

    The amplifier is housed in wide body SOIC-8DWV package with 9 mm creepage and clearance. 1.3.8 Board Views Top view of the driver board ISO5852SDWEVM-017 is shown in Figure Figure 3 shows the driver EVM soldered on top of power module.
  • Page 9: Test Setup And Results

    C16 and C36 should be removed. Before You Begin When starting to evaluate and test the ISO5852SDWEVM-017 EVM, it will typically be in a stand-alone configuration, separate from power module. This EVM does not internally generate high voltages or high temperatures.
  • Page 10: Equipment

    To minimize risk of electrical shock hazard, always follow all high voltage safety rules and regulations while operating electrical equipment! When evaluating ISO5852SDWEVM-017 with EVM attached to its intended vendor provided power module as part of the system level measurements and assessments, the power module will have accessibility of high voltage and high temperatures that impact the EVM’s operating conditions as well.
  • Page 11: Power Up And Bias Supply Voltages Vu And Vl Test Setup

    PS1 and return to initial stage 4. Gradually reduce the voltage at PS1 to 0 V and disable it SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 12: Test Setup For Input And Output Switching Waveforms

    Test setup for switching waveforms is shown in Figure Figure 5. Test Setup for Input and Output Switching Waveforms ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 13: Function Generator Settings

    7. Gradually reduce voltage at PS1 down to 0 and disable it (Make sure function generator outputs are disabled before this action!) SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 14: Major Input And Output Waveforms Using Output Overlapping Prevention Feature

    INL (blue) is low side input: 3.0V/div • OL (red) is low side output: 10V/div • Time scale is 50µs/div ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 15: Thermistor Amplifier Test Setup

    0.4 V - 0.6 V 0.8 V - 1.2 V 1.0 V - 1.4 V 1.2 V - 1.5 V SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 16: Input Bus Voltage Sense Amplifier Test Setup

    1.1 V - 1.4 V 1.05 V - 1.35 V 1.0 V - 1.3 V 0.95 V - 1.25 V ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 17: Safety Isolated Regions Between High And Low Voltage Board Areas

    Test Setup and Results www.ti.com Figure 9. Safety Isolated Regions between High and Low Voltage Board Areas SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 18: Board Layout

    General top and bottom view, component placement and all four layers are shown in Figure 10 through Figure 16 respectively. Figure 10. Top View of the Board ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 19: Bottom View Of The Board

    Board Layout www.ti.com Figure 11. Bottom View Of The Board SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 20: Component Placement

    Board Layout www.ti.com Figure 12. Component Placement ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 21: Top Layer

    Board Layout www.ti.com Figure 13. Top Layer SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 22: Signal Layer 1

    Board Layout www.ti.com Figure 14. Signal Layer 1 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 23: Signal Layer

    Board Layout www.ti.com Figure 15. Signal Layer 2 SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 24: Bottom Layer

    Board Layout www.ti.com Figure 16. Bottom Layer ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 25: Schematic And Bill Of Materials

    B6 - input bus voltage sensing isolated amplifier • B7 - thermistor based temperature sense isolated amplifier The ISO5852SDWEVM-017 EVM allows following adjustments depending on applications. • By default the board set into output overlapping protection mode. Removing resistor shunts R48 and R52 allows output overlapping •...
  • Page 26: Electrical Schematic Of Iso5852Sdwevm-017

    Schematic and Bill of Materials www.ti.com Figure 17. Electrical Schematic of ISO5852SDWEVM-017 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 27: Electrical Schematic With Functional Blocks Outlined

    Schematic and Bill of Materials www.ti.com Figure 18. Electrical Schematic with Functional Blocks Outlined SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 28: Waveforms With Overlapping Enabled

    INL (blue) is low side input: 3.0V/div • OL (red) is low side output: 10V/div • Time scale is 50µs/div ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 29: Rise Time And Propagation Delay Waveforms With 10 Nf Load

    • Time scale is 50ns/div • Rise time is about 30 ns • Propagation delay is 133.5 ns SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 30: Fall Time And Propagation Delay Waveforms With 10 Nf Load

    • Time scale is 50ns/div • Fall time is about 34 ns • Propagation delay is 98.5 ns ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 31: Bill Of Materials

    ZXTP2012ZTA SOT-89 A, AEC-Q101, SOT-89 Panasonic RES, 1.00 k, 1%, 0.25 W, R1, R17 1.00k ERJ-P06F1001V 0805 0805 SLLU298 – May 2018 ISO5852SDW Driving and Protecting SiC and IGBT Power Modules Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 32 150-mA, 30-V, Ultra-Low IQ, Wide Input Low- Dropout Regulator with TPS70950DBVR Texas Instruments DBV0005A Reverse Current Protection, DBV0005A (SOT-23-5) ISO5852SDW Driving and Protecting SiC and IGBT Power Modules SLLU298 – May 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated...
  • Page 33 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
  • Page 34 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
  • Page 35 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿6丁目24番1号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 3.4 European Union 3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a low-voltage power-supply network that supplies buildings used for domestic purposes.
  • Page 36 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2018, Texas Instruments Incorporated...
  • Page 37 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...

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