SBC81821 Socket478 All-in-One CPU Card Series User's Manual
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Name
Flat panel data output
P0~P47
Activity Indicator and Enable Backlight outputs
ENABKL
Shift clock. Pixel clock for flat panel data
SHFCLK
M signal for panel AC drive control
M
Latch pulse. Flat panel equivalent of HSYNC
LP
First line marker. Flat panel equivalent of VSYNC
FLM
+12V power controlled by chipset
+12VM
Power sequencing controls for panel LCD Vcc
ENAVDD
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Description
IBM PC/XT, PC/AT and PS/2
compatible with bi-directional
parallel port
Enhance parallel port (EPP)
compatible with EPP 1.7 and EPP
1.9 (IEEE 1284 compliant)
Microsoft and Hewlett Packard
extended capabilities port (ECP)
IEEE 1284 compliant
Hardware Description
TM
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