Ssb: Trident Wx69 - Philips LC8.2HA LA Service Manual

Chassis
Table of Contents

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Circuit Diagrams and PWB Layouts

SSB: Trident WX69

1
2
3
4
TRIDENT - WX69
B04A
A
7C01-3
SVP WX68
B
+3V3_SW
5C06
WX_PVCC
FC01
WX_PVCC
L4
PVCC
IC07
M5
33R
ANTSTO
M4
AVCC1
N4
TA1P A14
AVCC2
N5
AVCC3
TA1M
WX_AVCC
P4
AVCC4
TB1P
+3V3_SW
L2
5C07
NC
RXC-
TB1M
FC02
WX_AVCC
L1
RXC+
TC1P
NC
L3
33R
TMDS_GND1
TC1M
C
M3
TMDS_GND2
TD1P
N3
TMDS_GND3
TD1M
P3
TMDS_GND4
TE1P
R1
TMDS_GND5
TE1M
M2
TCLK1M B17
RX0-
M1
RX0+
TCLK1P
N2
RX1-
TCLK2M
NC
N1
RX1+
TCLK2P
P2
RX2-
TE2M
P1
+3V3_SW
5C08
RX2+
TE2P
WX_REGVCC
FC03
WX_REGVCC
R5
D
REGVCC
TD2M
P5
TD2P F20
33R
DGND
T10
PWR5V
TC2M
NC
T11
NC
DSCL
TC2P
U11
DSDA
TA2M
NC
U12
WS
TA2P
V11
SCDT
TB2M
NC
V12
SD0
TB2P
+3V3_SW
+3V3_SW
+3V3_SW
W11
AUDIOCLK
NC
W12
E
SPDIF
NC
Y11
SCK
IC14
IC15
IC16
F
+1V2_SW
5C09
FC04
+3V3_SW
+1V2_ADC
G
33R
5C10
FC05
+1V2_PLL
33R
H
5C11
FC06
+1V2_CORE
33R
C14
C15
I
D13
+1V2_CORE
D14
D15
E13
E14
E15
G16
H5
H16
J
J5
J16
K5
K16
R16
+2V5_VDDMQ
T14
T15
B4
C4
D4
K
D5
D11
E5
E6
E9
E10
E11
+3V3_SW
E12
+2V5_VDDMQ
+3V3_SW
F5
5C12
FC07
WX_AVDD3_ADC1
G5
L16
L
33R
M16
N16
RES
P16
WX_AVSS_ADC1
2C69
T12
+3V3_SW
T13
10u
R17
5C13
FC08
WX_AVDD3_ADC2
R18
P20
33R
NC
WX_AVDD3_ADC1
Y3
M
WX_AVDD3_ADC2
U9
+3V3_SW
WX_AVSS_ADC2
WX_AVDD3_OUTBUF
U3
E2
IXXX
5C14
E8
FC09
33R
WX_LVDS_VD D
WX_AVDD3_BG_ASS
V3
WX_PAVDD 1
T3
WX_PAVDD 2
T4
WX_AVDD_ADC1
U5
WX_LVDS_VSS
WX_AVDD_ADC2
U7
WX_AVDD_ADC3
T8
N
+1V2_PLL
WX_AVDD_ADC4
U6
D18
5C15
FC10
+1V2_PLL
WX_AVDDAPLL
E17
WX_LVDS_VD D
D16
33R
WX_AVDDAPLL
C17
WX_AVDDLLPLL
D17
U1
WX_AVSSAPLL
R2
+1V2_PLL
V5
W5
5C16
FC11
WX_AVDDLLPLL
V7
O
W7
33R
WX_AVSSLLPLL
100p
2C84
2C85
100p
2C86
100p
P
2C87
100p
2C88
100p
2C89
100p
3139 123 6349.1
1
2
3
4
LC8.2HA LA
10.
5
6
7
8
9
Pin Name
Pin No
1(HIGH)
0(LOW)
WS
U12
Use ALE to latch Address
Use Falling Edges of WR#&RD# to latch Address(*)
SD0
V12
Use Rising Edge of WR# to latch data(*)
Use Falling Edge of WR# to latch dat a
SCK
Y11
I2C Slave Address=0x7E/7F(*)
I2C Slave Address=0x7C/7 D
2C01
18p
3C02
18p
33R
2C02
W1
XTALI
Y1
XTALO
WX_PAVDD 1
2C81
2n7
U2
MLF1
AD(0:7)
TxFPGAe_0p
WX_PAVDD 2
2C82
2n7
R4
PLF2
TxFPGAe_0n
B14
AD(0)
3C04-1
1
8
100R
L17
AD0
A15
TxFPGAe_1p
AD(1)
2
7
L18
3C04-2
100R
AD1
TxFPGAe_1n
B15
AD(2)
3C04-3
3
6
100R
L19
AD2
A16
TxFPGAe_2p
AD(3)
3C04-4 4
5
L20
100R
AD3
B16
TxFPGAe_2n
AD(4)
3C05-1
1
8
100R
K17
AD4
TxFPGAe_3p
A18
AD(5)
3C05-2
2
7
100R
K18
AD5
B18
TxFPGAe_3n
AD(6)
3C05-3
3
6
100R
K19
AD6
TxFPGAe_4p
A19
A(0:7)
AD(7)
3C05-4
4
5
100R
K20
AD7
B19
TxFPGAe_4n
A(0)
1
8
N17
3C06-1
100R
ADDR0
TxFPGAe_CLKn
A(1)
3C06-2
2
100R
7
N18
ADDR1
A17
TxFPGAe_CLKp
A(2)
3C06-3 3
6
100R
N19
ADDR2
F19
TxFPGAo_CLKn
A(3)
3C06-4
4
5
100R
N20
ADDR3
TxFPGAo_CLKp
E20
A(4)
3C03-4
4
100R
5
M20
ADDR4
H19
TxFPGAo_4n
A(5)
3C03-3
3
6
100R
M19
ADDR5
TxFPGAo_4p
G20
A(6)
3C03-2 2
100R
7
M18
ADDR6
G19
TxFPGAo_3n
A(7)
1
8
M17
3C03-1
100R
ADDR7
TxFPGAo_3p
ALE_EMU
J18
ALE
E19
TxFPGAo_2n
J19
WR
WR_
D20
TxFPGAo_2p
RD
J20
RD_
B20
TxFPGAo_0n
100R
H17
IIC_SDA_SIDE
3C08
IXXX
SDA
A20
TxFPGAo_0p
IIC_SCL_SIDE
3C09
100R
IXXX
H18
SCL
TxFPGAo_1n
D19
CS
3C10
22R
IXXX
J17
CPU_CS
C20
TxFPGAo_1p
7C01-4
SVP WX68
B3
5C17
VDDC1
VSS1
C6
WX_AVDD3_OUTBUF
IXXX
VDDC2
VSS2
C9
VDDC3
VSS3
33R
C12
VDDC4
VSS4
VSS5 D2
VDDC5
H8
WX_AVSS_OUTBUF
VDDC6
VSS6
H9
VDDC7
VSS7
H10
VDDC8
VSS8
H11
VDDC9
VSS9
IC03
5C18
H12
WX_AVDD3_BG_ASS
VDDC10
VSS10
H13
VDDC11
VSS11
33R
J8
VDDC12
VSS12
J9
VDDC13
VSS13
J10
WX_AVSS_BG_ASS
VDDC14
VSS14
J11
VDDC15
VSS15
J12
VDDC16
VSS16
3C46
J13
WX_PAVDD 1
IXXX
VDDC17
VSS17
K8
VDDC18
VSS18
22R
VSS19 K9
VDDM1
K10
VDDM2
VSS20
K11
WX_PAVSS1
VDDM3
VSS21
K12
VDDM4
VSS22
3C48
K13
WX_PAVDD 2
IXXX
VDDM5
VSS23
L5
22R
VDDM6
VSS24
L8
VDDM7
VSS25
L9
VDDM8
VSS26
WX_PAVSS2
L10
VDDM9
VSS27
L11
VDDM10
VSS28
L12
VDDM11
VSS29
L13
IC04
VDDM12
VSS30
5C19
M8
WX_AVDD_ADC1
VDDM13
VSS31
M9
VDDH1
VSS32
33R
VSS33 M10
VDDH2
M11
VDDH3
VSS34
M12
WX_AVSS_ADC1
VDDH4
VSS35
M13
VDDH5
VSS36
N8
VDDH6
VSS37
N9
5C20
VDDH7
VSS38
N10
WX_AVDD_ADC2
VDDH8
VSS39
VSS40 N11
NC
33R
N12
AVDD3_ADC1
VSS41
N13
AVDD3_ADC2
VSS42
WX_AVSS_ADC2
P18
AVDD3_OUTBUF
VSS43
T16
VDDR1
VSS44
H20
VDDR2
VSS45
Y2
WX_AVSS_OUTBUF
IC05
AVDD3_BG_ASS
AVSS_OUTBUF
5C21
VSSR1 E4
WX_AVDD_ADC3
PAVDD1
E7
PAVDD2
VSSR2
33R
W3
WX_AVSS_BG_ASS
AVDD_ADC1
AVSS_BG_ASS
T2
WX_PAVSS1
AVDD_ADC2
PAVSS1
R3
WX_PAVSS2
WX_AVSS_ADC3
AVDD_ADC3
PAVSS2
T5
WX_AVSS_ADC1
AVDD_ADC4
AVSS_ADC1
T7
WX_AVSS_ADC2
LVDS_VDD P
AVSS_ADC2
AVSS_ADC3 T9
WX_AVSS_ADC3
5C22
LVDS_VDD A
T6
WX_AVSS_ADC4
WX_AVDD_ADC4
LVDS_VDD D
AVSS_ADC4
E18
LVDS_VDDO1
LVDS_VSSP
33R
E16
LVDS_VDDO2
LVDS_VSSA
C16
WX_LVDS_VSS
AVDDAPLL
LVDS_VSSD
C18
WX_AVSS_ADC4
AVDDLLPLL
LVDS_VSSO 1
C19
VREFN_1
LVDS_VSSO 2
V1
WX_AVSSAPLL
VREFP_1
AVSSAPLL
T1
WX_AVSSLLPLL
VREFN_2
AVSSLLPLL
VREFP_2
5
6
7
8
9
EN 59
10
11
12
13
7C01-1
SVP WX68
Y4
2C03
100n
CVBS_RF
CVBS1
V6
2C04
100n
HD_Y_IN
Y_G1
W6
2C05
100n
SC2_Y_CVBS_IN
Y_G2
Y_G3 Y6
2C06
100n
SVHS_Y_CVBS_IN
W2
SC1_RF_OUT_CVBS
CVBS_OUT1
V2
SC2_CVBS_MON_OUT
CVBS_OUT2
V9
2C07
100n
SVHS_C_IN
C
W9
2C08
100n
HD_PB_IN
PB_B1
Y9
2C09
100n
SC1_B_IN
PB_B2
Y10
2C10
100n
SC1_CVBS_IN
PB_B3
Y8
2C11
100n
HD_PR_IN
PR_R1
W8
2C12
100n
PR_R2
SC2_C_IN
V8
100n
2C13
CVBS_IN_DTV
PR_R3
FS1 V4
C?
100n
SC1_G_IN
W4
100n
2C15
SC1_R_IN
FS2
Y5
SC1_FBL_IN
FB1
U4
FB2
NC
V10
PC_VGA_H
AIN_H
U10
PC_VGA_V
AIN_V
U8
2C17
100n
VGA_R_IN
PC_R
PC_G Y7
2C18
100n
VGA_G_IN
W10
2C19
100n
VGA_B_IN
PC_B
F17
3C19
470R
TESTMODE
F16
3C20
1K0
V5SF
+3V3_STBY
G17
PWM0
+3V3_SW
G18
SVPWX_INT
INTN
F18
4C07
SVPWX_RST
RESET
3C22
3C23
220R
FPGA_BL_DIMMING
4K7
IXXX
7C04
IC02
3C24
BC847BW
RES
IXXX
100R
3C07
100R
IC01
3C25
10K
7C02
IC17
BC847BW
RES
2C73
10u
RES
3V04
4C08
100R
Pin Name
Pin No
1(HIGH)
0(LOW)
DP_HS
P19
MPU in A/D Multiplix Mode
MPU in A/D Separate Mode(*)
7C01-2
SVP WX68
DDR_VREF
+3V3_SW
WX_BA1
BA1
WX_BA0
K4
BA0
K3
MVREF
WX_DQS3
E3
DQS3
WX_DQS2
B2
DQS2
WX_DQS1
B6
DQS1
WX_DQS0
B9
DQS0
+3V3_SW
WX_CLKE
B12
CLKE
WX_DQM3
K2
DQM3
WX_DQM2
B1
DQM2
WX_DQM1
A6
DQM1
WX_DQM0
A9
DQM0
VS
WX_MCK0#
A12
P17
MCK0_
HS P19
WX_MCK0
IC09
E1
MCK0
DPB_HS
+3V3_SW
D1
V19
CS1_
DPB_VS
WX_CS0#
IC10
J3
V20
CS0_
DPA_HS
WX_WE#
IC11
J4
Y19
WE_
DPA_VS
WX_CAS#
IC12
K1
Y20
CAS_
DPB_DE
WX_RAS#
IC13
J1
W20
RAS_
DPA_CLK
WX_MD31
J2
Y15
MD31
DPB_CLK T19
WX_MD30
D3
MD30
DPA23
WX_MD29
C3
Y12
MD29
DPA22
WX_MD28
C2
U13
MD28
DPA21
WX_MD27
C1
V13
MD27
DPA20
WX_MD26
A1
W13
MD26
DPA19
WX_MD25
A2
Y13
MD25
DPA18
WX_MD24
A3
Y14
MD24
DPA17 W14
WX_MD23
C5
MD23
DPA16
+1V2_ADC
WX_MD22
A4
V14
MD22
DPA15
WX_MD21
B5
U14
MD21
DPA14
WX_MD20
A5
U15
MD20
DPA13
WX_MD19
D6
V15
MD19
DPA12
WX_MD18
A7
W15
MD18
DPA11
WX_MD17
B7
Y16
MD17
DPA10 W16
WX_MD16
C7
MD16
DPA9
WX_MD15
D7
V16
MD15
DPA8
+1V2_ADC
WX_MD14
D8
U16
MD14
DPA7
WX_MD13
C8
U17
MD13
DPA6
WX_MD12
B8
V17
MD12
DPA5
WX_MD11
A8
W17
MD11
DPA4
WX_MD10
D9
Y17
MD10
DPA3
WX_MD9
D10
Y18
MD9
DPA2
WX_MD8
C10
W18
MD8
DPA1
WX_MD7
B10
V18
MD7
DPA0 W19
+1V2_ADC
WX_MD6
A10
MD6
DPB15
WX_MD5
A11
U18
MD5
DPB14
WX_MD4
B11
U19
MD4
DPB13
WX_MD3
C11
U20
MD3
DPB12
WX_MD2
D12
T20
MD2
DPB11
WX_MD1
A13
T18
MD1
DPB10
WX_MD0
B13
T17
MD0
DPB9 R19
WX_MA11
C13
MA11
DPB8
+1V2_ADC
WX_MA10
F1
R20
MA10
WX_MA9
F2
MA9
WX_MA8
F3
MA8
WX_MA7
F4
MA7
WX_MA6
G4
MA6
WX_MA5
G3
MA5
WX_MA4
G2
MA4
WX_MA3
G1
MA3
WX_MA2
H1
MA2
WX_MA1
H2
MA1
WX_MA0
H3
MA0
H4
10
11
12
13
2009-Apr-10
14
15
16
17
18
+5V_SW
+3V3_SW
7C03-1
74LCX14T
RES
3C30
1
2
22R
3C31
VGA_H
22R
7C03-2
74LCX14T
3C34
+5V_SW
3
4
22R
2C33
7C03-3
74LCX14T
100n
RES
3C33
3C36
VGA_V
5
6
22R
22R
7C03-4
74LCX14T
3C37
9
8
22R
RES
BL_ADJUST_ANA
RES
2C74
22u
BL_ADJUST_PWM
+3V3_SW
NC
DP_HS
IC18
DP_HS
NC
NC
HDMI_H
HDMI_V
HDMI_DE
HDMI_VCLK
NC
HDMI_Cr(9)
HDMI_Cr(8)
HDMI_Cr(7)
HDMI_Cr(6)
HDMI_Cr(5)
HDMI_Cr(4)
HDMI_Cr(3)
HDMI_Cr(2)
HDMI_Cb(9)
HDMI_Cb(8)
HDMI_Cb(7)
HDMI_Cb(6)
HDMI_Cb(5)
HDMI_Cb(4)
HDMI_Cb(3)
HDMI_Cb(2)
HDMI_Y(9)
HDMI_Y(8)
HDMI_Y(7)
HDMI_Y(6)
HDMI_Y(5)
HDMI_Y(4)
HDMI_Y(3)
HDMI_Y(2)
NC
NC
HDMI_Cb(1)
HDMI_Cb(0)
HDMI_Cr(1)
HDMI_Cr(0)
HDMI_Y(1)
HDMI_Y(0)
14
15
16
17
18
19
20
1C24 B7
3C44 D3
2C01 A6
3C45 G13
B04A
2C02 B6
3C46 H8
2C03 B9
3C47 H13
A
2C04 B9
3C48 H8
2C05 C9
3C49 I3
2C06 B9
3V04 E12
2C07 B9
4C07 D9
2C08 B9
4C08 E11
PC_VGA_H
2C09 B9
5C06 B2
2C10 B9
5C07 B2
2C11 B9
5C08 C2
2C12 C9
5C09 E2
B
2C13 B9
5C10 F2
PC_VGA_V
2C15 C9
5C11 F2
2C16 H3
5C12 I2
2C17 C9
5C13 I2
2C18 C9
5C14 J2
2C19 C9
5C15 J2
2C20 D9
5C16 K2
2C21 D9
5C17 G8
2C22 B2
5C18 G8
2C23 B2
5C19 I8
C
2C24 B2
5C20 I8
2C25 B2
5C21 J8
7C03-5
7C03-6
2C26 B2
5C22 J8
74LCX14T
74LCX14T
2C27 B2
7C01-1 B8
2C28 C2
7C01-2 F11
11
10
13
12
2C29 C2
7C01-3 B4
2C30 D9
7C01-4 F5
2C31 H3
7C02 E11
2C32 H3
7C03-1 A14
D
2C33 B15
7C03-2 B14
2C34 E2
7C03-3 B14
2C35 E2
7C03-4 C14
2C36 F3
7C03-5 C16
2C37 F4
7C03-6 C16
2C38 F4
7C04 D11
2C39 F4
FC01 B2
2C40 F4
FC02 B2
E
2C41 F2
FC03 C2
2C42 F2
FC04 E2
2C43 F2
FC05 F2
2C44 F2
FC06 F2
2C45 G2
FC07 I2
2C46 G2
FC08 I2
2C47 G2
FC09 J2
2C48 G3
FC10 J2
2C49 G3
FC11 K2
2C50 G3
IC10 B4
F
2C51 G3
IC11 C8
2C52 G3
IC13 C8
2C53 G3
IC14 D8
2C54 G3
IC15 D9
2C55 G4
IC16 D2
2C56 H2
IC17 D3
2C57 H2
IC18 D3
2C58 H3
IC19 D11
2C59 H3
IC20 D11
G
2C60 I8
IC21 D10
2C61 H3
IC22 E9
2C62 J8
IC23 G8
2C63 H3
IC24 G8
2C64 K8
IC25 G13
2C65 H4
IC26 H10
2C66 H4
IC27 H10
2C67 I2
IC28 H8
2C68 I2
IC29 H10
H
2C69 I4
IC30 H10
2C70 I2
IC31 H10
2C71 I2
IC32 H8
2C72 J2
IC33 I8
2C73 E10
IC35 J4
2C74 D12
IC36 J8
2C75 J2
2C76 J2
2C77 J3
I
2C78 K2
2C79 K2
2C80 K2
2C81 B7
2C82 B7
2C83 K2
2C84 K2
2C85 K2
2C86 K3
J
2C87 L2
2C88 L3
2C89 L2
2C90 G7
2C91 G8
2C92 G7
2C93 G8
2C94 H7
2C95 H8
K
2C96 H7
2C97 H8
2C98 I7
2C99 I8
2V01 I7
2V02 J7
2V03 K7
2V04 D7
2V05 D8
L
2V06 C9
3C01 B7
3C02 B7
3C03-1 C7
3C03-2 C7
3C03-3 C7
3C03-4 C7
3C04-1 B7
3C04-2 B7
M
3C04-3 B7
3C04-4 B7
3C05-1 B7
3C05-2 B7
3C05-3 B7
3C05-4 C7
3C06-1 C7
3C06-2 C7
3C06-3 C7
3C06-4 C7
N
3C07 D10
3C08 C7
3C09 C7
3C10 D7
3C19 C9
"C00-"C99" & "V00 - V99"
3C20 C9
3C22 D11
MULTI 12NC : 3139_123_63481
3C23 D11
SINGLE 12NC : 3139_123_63491
3C24 D12
O
3C25 D9
3C29 A13
3C30 A15
3C31 A13
3C32 B13
3C33 B13
3C34 B15
3C36 B15
3C37 C15
P
3C39 D2
3C40 D2
I_17760_005.eps
3C41 D3
3C42 D2
180208
3C43 D2
19
20

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