Register Address List For The 16552 And 16654; Table 5.2. Register Address List For The 16552 And 16654 - Contec COM-2(PCI) User Manual

I/O Ports and Registers

Register Address List for the 16552 and 16654

16552 : Used on the COM-2(PCI) and COM-4(PCI)
16654 : Used on the COM-8(PCI)

Table 5.2. Register Address List for the 16552 and 16654

0 DLAB = 0
Bit Receiver
No. Buffer
Register
(Read Only)
RBR
0 Data Bit 0
1 Data Bit 1
2 Data Bit 2
3 Data Bit 3
4 Data Bit 4
5 Data Bit 5
6 Data Bit 6
7 Data Bit 7
*2 : Each bit is 0 fixations in 16552.
52
(Short from Texas Instruments data book) < 1 / 2 >
0 DLAB = 0 1 DLAB = 0
Transmitter Interrupt
Holding
Register Register
(Write Only)
THR
Data Bit 0
Received
Available
Interrupt
(ERBFI)
Data Bit 1
Transmitter
Holding
Register
Interrupt
(ETBEI)
Data Bit 2
Receiver
Line Status
Interrupt
Data Bit 3
MODEM
Interrupt
(EDSSI)
Data Bit 4
Data Bit 5
Interrupt
Data Bit 6
Interrupt
Data Bit 7
Interrupt
COM-2(PCI), COM-4(PCI), COM-8(PCI)
Register
2
Interrupt
Enable Ident.
Register
(Read Only)
IER IIR
Enable "0" if
Interrupt
Data Pending
Enable Interrupt
ID
Bit (0)
Empty
Enable Interrupt
ID
Bit (1)
(ELSI)
Enable Interrupt
ID
Status Bit (2)
Sleep Interrupt
Mode ID
*2 Bit (3)
*2
Xoff Interrupt
ID
*2 Bit (4)
*2
RTS FIFOs
Enabled
*2
CTS FIFOs
Enabled
*2
2 3
FIFO Line
Control Control
Register Register
(Write Only)
FCR LCR
FIFO Word
Enable Length
Select
Bit 0
(WLS0)
RCVR Word
FIFO Length
Reset Select
Bit 1
(WLS1)
XMIT Number of
FIFO Stop Bits
Reset (STB)
DMA Parity
Mode Enable
Select (PEN)
TX Even
Trigger Parity
(LSB) Select
*2 (EPS)
TX Stick
Trigger Parity
(MSB)
*2
RCVR Set
Trigger Break
(LSB)
RCVR Divisor
Trigger Latch
(MSB) Access Bit
(DLAB)