Renesas 2SK3069 Datasheet page 5

Silicon n channel mos fet high speed power switching
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2SK3069
Reverse Drain Current vs.
Source to Drain Voltage
100
10 V
80
60
40
20
0
0.4
Source to Drain Voltage
0.3
0.1
0.03
0.01
Avalanche Test Circuit
V
DS
Monitor
Vin
50 Ω
15 V
Rev.11.00 Sep 07, 2005 page 5 of 7
5 V
V
= 0, –5 V
GS
Pulse Test
0.8
1.2
1.6
2.0
V
(V)
SD
Normalized Transient Thermal Impedance vs. Pulse Width
3
1
D = 1
0.5
10 µ
100 µ
L
I
AP
Monitor
Rg
D. U. T
Maximum Avalanche Energy vs.
Channel Temperature Derating
250
200
150
100
50
0
25
Channel Temperature Tch (°C)
θ
ch – c(t) = s (t) •
θ
ch – c = 1.25°C/W, Tc = 25°C
P
DM
1 m
10 m
100 m
Pulse Width
PW (S)
E
AR
V
DD
V
DD
0
I
= 50 A
AP
V
= 25 V
DD
duty < 0.1 %
Rg > 50 Ω
50
75
100
125
Tc = 25°C
γ
θ
ch – c
PW
D =
T
PW
T
1
10
Avalanche Waveform
V
DSS
1
• L • I
2
=
AP
V
– V
2
DSS
I
AP
I
D
150
DD
V
(BR)DSS
V
DS

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