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Table 6
On-Chip Register Descriptions
Register
Bit
MSTCR1
MSTP17
SCR_1
TIE
RIE
TE
RE
MPIE
TEIE
CKE1
CKE2
SMR_1
C/A
CHR
PE
O/E
STOP
REJ06B0357-0100O/Rev.1.00
Asynchronous Serial Data Transmission/Reception
Set Value
0
Module standby control register 1
SCI1 standby control bit
Standby cancelled when MSTP17 = 0
H'70
Serial control register 1 (SCI_1)
Transmit and receive control, interrupt control, transmit and receive
clock source control
0
Transmit interrupt enable
TXI interrupt requests enabled when set to 1
1
Receive interrupt enable
RXI and ERI interrupt requests enabled when set to 1
1
Transmit enable
Transmit operations enabled when set to 1
1
Receive enable
Receive operations enabled when set to 1
0
Multiprocessor interrupt enable
(In asynchronous mode, enabled when MP = 1 in SMR)
In the task example, disabled because MP = 0
0
Transmit end interrupt enable
TEI interrupt requests enabled when set to 1
0
Clock enable 1, 0
0
Selects clock source and SCK pin function
In the task example, clock source is on-chip clock and SCK pin is not
used
H'00
Serial mode register 1
Selects communication format and the clock source for on-chip baud
rate generator
0
Communication mode
Asynchronous mode when cleared to 0
0
Character length (enabled in asynchronous mode only)
8-bit transmission and reception when 0
0
Parity enable (enabled in asynchronous mode only)
No-parity transmission and reception when 0
0
Parity mode (enabled in asynchronous mode when PE = 1)
(In this example PE = 0 and this bit is disabled)
0
Stop bit length (enabled in asynchronous mode only)
1-stop-bit transmission and reception when 0
Function
March 2004
SH7145F
Page 9 of 17
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