Chip Configuration - Fujitsu D1271 Technical Manual

4.4.1 Chip Configuration

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SDRAM Configuration [By SPD]
This sets the optimal timings for items 2–5, depending on the memory
modules that you are using. The default setting is [By SPD], which configures
items 2–5 by reading the contents in the SPD (Serial Presence Detect) device.
The EEPROM on the memory module stores critical parameter information
about the module, such as memory type, size, speed, voltage interface, and
module banks. Configuration options: [User Define] [7ns (143MHz)] [8ns
(125MHz)] [By SPD]
SDRAM CAS Latency
This controls the latency between the SDRAM read command and the
time that the data actually becomes available. NOTE: This field appears
only when you set the SDRAM Configuration to [User Defined].
SDRAM RAS Precharge Time
This controls the idle clocks after issuing a precharge command to the
SDRAM. NOTE: This field appears only when you set the SDRAM
Configuration to [User Defined].
SDRAM RAS to CAS Delay
This controls the latency between the SDRAM active command and the
read/write command. NOTE: This field appears only when you set the
SDRAM Configuration to [User Defined].
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4. BIOS SETUP
D1271 / D1291 CUV-LSV / CUV-LV User's Manual