ADM-PCIE-8V3 User Manual
Revision History
Date
13 Jan 2016
15 Jan 2016
25 Feb 2016
23 Mar 2016
6 Jun 2016
22 Aug 2016
6 Jan 2017
1 May 2017
21 Jun 2017
28 Jun 2017
Revision Table
ad-ug-1308_v1_9.pdf
Revision
Changed By
1.0
K. Roth
1.1
K. Roth
1.2
K. Roth
1.3
K. Roth
1.4
K. Roth
1.5
K. Roth
1.6
K. Roth
1.7
K. Roth
1.8
K. Roth
1.9
D. Flint
Nature of Change
Initial Release
Added
GPIO Option
, and
Added
FireFly Breakout to Front Panel
breakout, updated
ADM-PCIE-8V3 Block Diagram
EEPROM, correct FPGA pin N29 net name from FB to LB
as in LTC2870 datasheet, added weight in
Specifications, updated configuration flash part number in
Configuration From Flash Memory
updated
DDR4 SDRAM
online csv, added note to drive LP_MODE low in section
QSFP28, Changed reference from ADM-XRC SDK to ADM-
PCIE-8V3 SDK, removed notes on automatic temperature
monitoring.
Added
Building and Programming Configuration
Correct clock pin locations in
added note to use pullnone in Clocking, added note about
SEL pins to
QSFP28
and FireFly, updated
Performance
to use test results.
Updated
LEDs
to correct Green LED index reference
mismatch
Added available power by rail table to
Added section:
Custom Flash Write
clock termination recommendation to HSTL_I in Clocking,
Added note about PCIe RX equalization options.
Scaled thermal performance graph to match innacuracies of
current measurement circuit
Optional Blower
to remove reference to vertical fan,
updated length and part number options in FireFly, updated
section
USB Front Panel Interface
utilization.
Updated all reference to DDR4 speeds at 16GB to be
2400MT/s and 32GB to be 1866MT/s.
Updated
Thermal Performance
accurate testing.
User EEPROM
and description of
Physical
to list part numbers and reference
PCIe Reference
Clocks,
Thermal
Power
Requirements,
Interface, Updated
Thermal
Performance, updated
to include avr2util
with data from more
to show
Images,
Page 37
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